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M38827GF-XXXHP Datasheet(PDF) 4 Page - Renesas Technology Corp |
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M38827GF-XXXHP Datasheet(HTML) 4 Page - Renesas Technology Corp |
4 / 62 page Rev.1.01 Nov 14, 2005 page 4 of 60 REJ03B0089-0101 3882 Group Functions Name Pin P40 P41 •8-bit I/O port with the same function as port P0 <Input level> CMOS compatible input level <Output level> P40, P41 : CMOS 3-state output structure P42-P47 : CMOS 3-state output structure or N- channel open-drain output structure •Each pin level of P42 to P46 can be read even in output port mode. Function except a port function Table 2 Pin description (2) •8-bit I/O port with the same function as port P0 •CMOS compatible input level •CMOS 3-state output structure •8-bit I/O port with the same function as port P0 •CMOS compatible input level. •CMOS 3-state output structure. •8-bit CMOS I/O port with the same function as port P0 <Input level> P70–P75 : CMOS compatible input level or TTL compatible input level P76, P77 : CMOS compatible input level <Output structure> N-channel open-drain output structure •Each pin level of P70 to P75 can be read even in output port mode. •8-bit CMOS I/O port with the same function as port P0 •CMOS compatible input level. •CMOS 3-state output structure. I/O port P4 P42/INT0 P43/INT1 P44 P45 P46 •Interrupt input pins P47 /CLKRUN •Serialized IRQ function pin P56 P57 P50/INT5 P51/INT20 P52/INT30 P53/INT40 P54/CNTR0 P55/CNTR1 I/O port P5 •Interrupt input pins •Timer X, timer Y function pins P60–P67 P70 P71 P72 P76 P77 I/O port P6 I/O port P7 •Interrupt input pins •LPC interface function pins P73/INT21 P74/INT31 P75/INT41 I/O port P8 P80/LAD0 P81/LAD1 P82/LAD2 P83/LAD3 P84/LFRAME P85/LRESET P86/LCLK P87/SERIRQ •Serialized IRQ function pin |
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