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M38D57GAXXXHP Datasheet(PDF) 7 Page - Renesas Technology Corp |
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M38D57GAXXXHP Datasheet(HTML) 7 Page - Renesas Technology Corp |
7 / 142 page Rev.3.04 May 20, 2008 Page 7 of 134 REJ03B0158-0304 38D5 Group PIN DESCRIPTION Table 3 Pin description (1) Pin Name Function Function except a port function VCC, VSS Power source • Apply power source voltage to VCC, and 0 V to VSS. RESET Reset input • Reset input pin for active “L”. XIN Clock input • Input and output pins for the main clock generating circuit. • Connect a ceramic resonator or a quartz-crystal oscillator between the XIN and XOUT pins to set the oscillation frequency. When an external clock is used, connect the clock source to XIN, and leave XOUT pin open. • Feedback resistor is built in between XIN pin and XOUT pin. XOUT Clock output VL1, VL2, VL3 LCD power source • Input 0 ≤ VL1 ≤ VL2 ≤ VL3 voltage. • Input 0 − VL3 voltage to LCD. COM0 − COM3 Common output • LCD common output pins. •COM2 and COM3 are not used at 1/2 duty ratio. •COM3 is not used at 1/3 duty ratio. COM4 /SEG35− COM7 /SEG32 Common output Segment output • LCD common/segment output pins. P00/SEG8 − P07/SEG15 I/O port P0 • 8-bit I/O port. • CMOS compatible input level. • CMOS 3-state output structure. • I/O direction register allows each pin to be individually programmed as either input or output. • Pull-up control is enabled in a bit unit. P10/SEG16 − P17/SEG23 I/O port P1 • 8-bit I/O port. • CMOS compatible input level. • CMOS 3-state output structure. • I/O direction register allows each pin to be programmed as either input or output. • Pull-up control is enabled in 4-bit unit. P20/SEG0/(KW4) − P23/SEG3/(KW7) I/O port P2 • 8-bit I/O port. • CMOS compatible input level. • CMOS 3-state output structure. • I/O direction register allows each pin to be individually programmed as either input or output. • Pull-up control is enabled in a bit unit. • Key input interrupt input pins P24/SEG4 − P27/SEG7 P30/SEG24 − P37/SEG31 I/O port P3 • 8-bit I/O port. • CMOS compatible input level. • CMOS 3-state output structure. • I/O direction register allows each pin to be individually programmed as either input or output. • Pull-up control is enabled in 4-bit unit. P40/RXD P41/TXD P42/SCLK1 P43/SRDY1 I/O port P4 • 8-bit I/O port. • CMOS compatible input level. • CMOS 3-state output structure. • I/O direction register allows each pin to be individually programmed as either input or output. • Pull-up control is enabled in 4-bit unit. • Serial I/O1 function pins P44/SIN2/(KW0) P45/SOUT2/(KW1) P46/SCLK2/(KW2) P47/SRDY2/(KW3) • Serial I/O2 function pins • Key input interrupt input pins |
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