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M38263EFGP Datasheet(PDF) 4 Page - Renesas Technology Corp |
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M38263EFGP Datasheet(HTML) 4 Page - Renesas Technology Corp |
4 / 91 page Rev.1.00 Sep 06, 2006 page 4 of 88 REJ03B0181-0100 3826 Group (One Time PROM version) PIN DESCRIPTION Table 1 Pin description (1) VCC VSS Function Pin Name Function except a port function •LCD segment output pins Power source •Apply voltage of power source to VCC, and 0 V to VSS. (For the limits of VCC, refer to “Recom- mended operating conditions”. VREF AVSS RESET XIN XOUT VL1–VL3 C1, C2 COM0–COM3 SEG0–SEG17 P00/SEG26– P07/SEG33 P10/SEG34– P15/SEG39 P16, P17 P20 – P27 P30/SEG18 – P37/SEG25 Analog refer- ence voltage Analog power source Reset input Clock input Clock output LCD power source Charge-pump capacitor pin Common output Segment output I/O port P0 I/O port P1 I/O port P2 Output port P3 •Reference voltage input pin for A/D converter and D/A converter. •GND input pin for A/D converter and D/A converter. •Connect to VSS. •Reset input pin for active “L”. •Input and output pins for the main clock generating circuit. •Connect a ceramic resonator or a quartz-crystal oscillator between the XIN and XOUT pins to set the oscillation frequency. •If an external clock is used, connect the clock source to the XIN pin and leave the XOUT pin open. A feedback resistor is built-in. •Input 0 ≤ VL1 ≤ VL2 ≤ VL3 voltage. •Input 0 – VL3 voltage to LCD. (0 ≤ VL1 ≤ VL2 ≤ VL3 when a voltage is multiplied.) •External capacitor pins for a voltage multiplier (3 times) of LCD control. •LCD common output pins. •COM2 and COM3 are not used at 1/2 duty ratio. •COM3 is not used at 1/3 duty ratio. •LCD segment output pins. •8-bit I/O port. •CMOS compatible input level. •CMOS 3-state output structure. •Pull-up control is enabled. •I/O direction register allows each 8-bit pin to be pro- grammed as either input or output. •6-bit I/O port. •CMOS compatible input level. •CMOS 3-state output structure. •Pull-up control is enabled. •I/O direction register allows each 6-bit pin to be pro- grammed as either input or output. •2-bit I/O port. •CMOS compatible input level. •CMOS 3-state output structure. •I/O direction register allows each pin to be individually programmed as either input or output. •Pull-up control is enabled. •8-bit I/O port. •CMOS compatible input level. •CMOS 3-state output structure. •I/O direction register allows each pin to be individually programmed as either input or output. •Pull-up control is enabled. •8-bit output. •CMOS 3-state output structure. •Port output control is enabled. •Key input (key-on wake-up) interrupt input pins •LCD segment output pins |
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