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M38825G5-XXXHP Datasheet(PDF) 3 Page - Renesas Technology Corp |
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M38825G5-XXXHP Datasheet(HTML) 3 Page - Renesas Technology Corp |
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3 / 62 page  Rev.1.01 Nov 14, 2005 page 3 of 60 REJ03B0089-0101 3882 Group VCC, VSS PIN DESCRIPTION Functions Name Pin •Apply voltage of 3.3 V ±10 % to Vcc, and 0 V to Vss. •Connected to VSS. •Reset input pin for active “L”. •Input and output pins for the clock generating circuit. •Connect a ceramic resonator between the XIN and XOUT pins to set the oscillation frequency. •When an external clock is used, connect the clock source to the XIN pin and leave the XOUT pin open. •8-bit I/O port. •I/O direction register allows each pin to be individually programmed as either input or output. •CMOS compatible input level. •CMOS 3-state output structure or N-channel open-drain output structure. •8-bit I/O port. •I/O direction register allows each pin to be individually programmed as either input or output. •CMOS compatible input level. •CMOS 3-state output structure or N-channel open-drain output structure. •8-bit I/O port. •I/O direction register allows each pin to be individually programmed as either input or output. •CMOS compatible input level. •CMOS 3-state output structure. •P24 to P27 (4 bits) are enabled to output large current for LED drive. •8-bit I/O port. •I/O direction register allows each pin to be individually programmed as either input or output. •CMOS compatible input level. •CMOS 3-state output structure. •These pins function as key-on wake-up . •These pins are enabled to control pull-up. Power source Table 1 Pin description (1) Function except a port function Reset input Clock input I/O port P0 I/O port P1 I/O port P2 I/O port P3 RESET XIN CNVSS input XOUT Clock output P00–P07 •Key-on wake-up input pins CNVSS P10–P17 P20–P27 P30–P37 |
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