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R8A66173SP Datasheet(PDF) 2 Page - Renesas Technology Corp |
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R8A66173SP Datasheet(HTML) 2 Page - Renesas Technology Corp |
2 / 13 page R8A66173SP REJ03F0264-0100 Rev.1.00 Jan.24.2008 Page 2 of 12 BLOCK DIAGRAM (EACH CHANNEL) FUNCTION The PWM output waveform of each channel is controlled by taking in PWM data from MCU or other device via serial data input SIN. 12-bit PWM data is input being divided between upper 8-bits (upper byte) and lower 4-bits. The lower 4-bit data is combined with command data such as channel designation and input as 8-bit data (lower byte). The lower byte should be written first, and then the upper byte. Even if only the upper byte is to be changed, rewrite from the lower byte. The PWM waveform changes according to the new setting from the next cycle. One cycle of PWM waveform (=4096 divisions; 12-bit resolution) are divided into 16 (2 4) subsections t. Each subsection consists of 256 (=2 8; 8-bit resolution) minimum bits τ(=2/fXIN**). One subsection t consists of an 8-bit PWM waveform (basic waveform). The “H” width of this waveform is determined according to the upper 8-bits of PWM data. One cycle has 16 subsections t, each of which has this basic waveform. Among them, those which are designated by the 4-bit-rate multiplier are conditioned to have a “H” width that is longer by τ. The lower 4-bits of PWM data are used to specify those subsections (tm). The waveform of other subsections remains unchanged. The PWM waveform (12-bit resolution) is a combination of two types of waveforms which are different in “H” width, as described above. When output control input OC is “H”, the output of every 4-channel turns high-impedance from the next cycle. When reset input R is “L”, the output of every channel turns high-impedance as soon as the ongoing cycle is completed, and PWM data of all channels is reset. If R input is changed from “L” to “H”, the next cycle starts, however, the output of the channels remains high-impedance. To enable output, rewrite input data for each channel. **)fXIN: Clock XIN repeat frequency Input register Vcc PWM1 PWM3 SIN WR 3 CS 1 2 6 13 12 14 11 4 SCLK 5 Control circuit OC R Upper byte register Low er byte register PWM register 8-bit PWM circuit 4-bit-rate multiplier 12-bit PWM circuit Oscillation circuit 1/2 divider To other channels PWM2 PWM4 XIN GND 8 10 7 XOUT 9 |
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