R2J20601NP

REJ03G0237-0700 Rev.7.00 Jun 30, 2008

Page 11 of 13

The PWM input is TTL level and has hysteresis. When the PWM input signal is abnormal, e.g., when the signal route

from the control IC is abnormal, the tri-state function turns off the high- and low-side MOS FETs. This function

operates when the PWM input signal stays in the input hysteresis window for 240 ns (typ.). After the tri-state mode has

been entered and GH and GL have become low, a PWM input voltage of 3.8 V or more is required to make the circuit

return to normal operation.

3.8 V

3.8 V

PWM

PWM

GH

GH

GL

GL

1.2 V

1.2 V

Figure 1