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STW24NM65N Datasheet(PDF) 5 Page - STMicroelectronics |
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STW24NM65N Datasheet(HTML) 5 Page - STMicroelectronics |
5 / 19 page STB24NM65N-STI24NM65N-STF24NM65N-STP/W24NM65N Electrical characteristics 5/19 2 Electrical characteristics (TCASE=25 °C unless otherwise specified) Table 5. On/off states Symbol Parameter Test conditions Min. Typ. Max. Unit V(BR)DSS Drain-source breakdown voltage ID = 1 mA, VGS = 0 650 V dv/dt (1) 1. Characteristic value at turn off on inductive load Drain source voltage slope VDD= 520 V, ID=19 A, VGS=10 V 35 V/ns IDSS Zero gate voltage drain current (VGS = 0) VDS = max rating VDS = max rating, @125 °C 1 100 µA µA IGSS Gate-body leakage current (VDS = 0) VGS = ± 20 V ±100 nA VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA 2 3 4 V RDS(on) Static drain-source on resistance VGS = 10 V, ID = 9.5 A 0.16 0.19 Ω Table 6. Dynamic Symbol Parameter Test conditions Min. Typ. Max. Unit gfs (1) 1. Pulsed: pulse duration = 300µs, duty cycle 1.5% Forward transconductance VDS= 15 V, ID = 9.5 A 14 S Ciss Coss Crss Input capacitance Output capacitance Reverse transfer capacitance VDS = 50 V, f = 1 MHz, VGS = 0 2500 120 10 pF pF pF Coss eq (2) 2. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS Equivalent output capacitance VGS = 0, VDS = 0 to 520 V 310 pF Qg Qgs Qgd Total gate charge Gate-source charge Gate-drain charge VDD = 520 V, ID = 19 A, VGS = 10 V, (see Figure 19) 70 10 40 nC nC nC RG Gate input resistance f=1 MHz gate DC bias = 0 Test signal level = 20 mV open drain 2.5 Ω |
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