CYDM064B16, CYDM128B16, CYDM256B16
Document #: 001-00217 Rev. *F
Page 8 of 24
Table 4. Input Read Register Operation[12, 15]
SFEN
CE
R/W
OE
UB
LB
ADDR
IO0–IO1
IO2–IO15
Mode
HLHL
L
L
x0000-Max VALID[13] VALID[13] Standard Memory Access
L
L
H
L
X
L
x0000
VALID[14]
X
IRR Read
Table 5. Output Drive Register [16]
SFEN
CE
R/W
OE
UB
LB
ADDR
IO0–IO4
IO5–IO15
Mode
HL
H
X[17]
L[13]
L[13]
x0000-Max VALID[13] VALID[13] Standard Memory Access
L
L
L
X
X
L
x0001
VALID[14]
X
ODR Write[16, 18]
L
L
H
L
X
L
x0001
VALID[14]
X
ODR Read[16]
Table 6. Semaphore Operation Example
Function
IO0–IO15 Left
IO0–IO15 Right
Status
No action
1
1
Semaphore free
Left port writes 0 to semaphore
0
1
Left Port has semaphore token
Right port writes 0 to semaphore
0
1
No change. Right side has no write access
to semaphore.
Left port writes 1 to semaphore
1
0
Right port obtains semaphore token
Left port writes 0 to semaphore
1
0
No change. Left port has no write access
to semaphore.
Right port writes 1 to semaphore
0
1
Left port obtains semaphore token
Left port writes 1 to semaphore
1
1
Semaphore free
Right port writes 0 to semaphore
1
0
Right port has semaphore token
Right port writes 1 to semaphore
1
1
Semaphore free
Left port writes 0 to semaphore
0
1
Left port has semaphore token
Left port writes 1 to semaphore
1
1
Semaphore free
Notes
12. SFEN = VIL for IRR reads
13. UB or LB = VIL. If LB = VIL, then DQ<7:0> are valid. If UB = VIL then DQ<15:8> are valid.
14. LB must be active (LB = VIL) for these bits to be valid.
15. SFEN active when either CEL = VIL or CER = VIL. It is inactive when CEL = CER = VIH.
16. SFEN = VIL for ODR reads and writes.
17. Output enable must be low (OE = VIL) during reads for valid data to be output.
18. During ODR writes data are also written to the memory.
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