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M95320WDW6TG Datasheet(PDF) 6 Page - STMicroelectronics |
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M95320WDW6TG Datasheet(HTML) 6 Page - STMicroelectronics |
6 / 46 page Description M95320, M95640, M95320-x, M95640-x 6/46 1 Description The M95320, M95320-W, M95320-R, M95640, M95640-W and M95640-R are electrically erasable programmable memory (EEPROM) devices. They are accessed by a high-speed SPI-compatible bus. The M95320, M95320-W and M95320-R are 32 Kbit devices organized as 4096 x 8 bits. The M95640, M95640-W and M95640-R are 64 Kbit devices organized as 8192 x 8 bits. The device is accessed by a simple serial interface that is SPI-compatible. The bus signals are C, D and Q, as shown in Table 1 and Figure 1. The device is selected when Chip Select (S) is taken low. Communications with the device can be interrupted using Hold (HOLD). Figure 1. Logic diagram Figure 2. 8 pin package connections 1. See Package mechanical data section for package dimensions and how to identify pin-1. AI01789C S VCC M95xxx HOLD VSS W Q C D D VSS C HOLD Q SVCC W AI01790D M95xxx 1 2 3 4 8 7 6 5 |
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Similar Description - M95320WDW6TG |
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