© 2008 Fairchild Semiconductor Corporation

www.fairchildsemi.com

SG5851A • Rev. 1.0.0

7

Functional Description

SG5851A devices integrate many useful designs into

one controller for low-power, switch-mode, power

supplies. The following descriptions highlight some of

the features of the SG5851A series.

Startup Current

The startup current is only 9µA, which allows a startup

resistor with a high resistance and a low-wattage to

supply the startup power for the controller. A 1.5MΩ,

capacitor are sufficient for an AC-to-DC power adapter

Operating Current

The operating current has been reduced to 3mA, which

capacitance requirement.

Green-Mode Operation

The proprietary green-mode function provides off-time

modulation to linearly decrease the switching frequency

under light-load conditions. On-time is limited to provide

stronger protection against brownouts and abnormal

conditions. The feedback current, which is sampled

from the voltage feedback loop, is taken as the

reference. Once the feedback current exceeds the

threshold current, the switching frequency starts to

decrease. Green mode dramatically reduces power

consumption under light-load and zero-load conditions.

Power supplies using SG5851A meet even the strictest

regulations regarding standby power consumption.

Oscillator Operation

A resistor connected from the RI pin to ground

generates a constant current source used to charge an

internal capacitor. The charge time determines the

internal clock speed and the switching frequency.

Increasing the resistance reduces the amplitude of the

input current and reduces the switching frequency. A

and a 70kHz switching frequency. The relationship

)

(

)

(

6650

kHz

k

R

f

I

PWM

Ω

=

(1)

The range of the oscillation frequency is designed to be

within 50kHz ~ 80kHz.

Leading-Edge Blanking (LEB)

Each time the power MOSFET is switched on, a turn-on

spike occurs at the sense-resistor. To avoid premature

termination of the switching pulse, a 310ns leading-

edge blanking time is built in. Conventional RC filtering

can therefore be omitted. During this blanking period,

the current-limit comparator is disabled and it cannot

switch off the gate driver.

Constant Output Power Limit

When the SENSE voltage across the sense resistor,

This propagation delay introduces an additional current

Higher input line voltages result in larger additional

currents. At high input line voltages, the output power

limit is higher than at low input line voltages.

To compensate for this output power limit variation

across a wide AC input range, the threshold voltage is

adjusted by adding a positive ramp. This ramp signal

rises from 0.80V to 1.00V, then flattens out at 1.00V. A

smaller threshold voltage forces the output GATE drive

to terminate earlier. This reduces the total PWM turn-on

time and makes the output power equal to that of low-

line input. This proprietary internal compensation

ensures a constant output power limit for a wide AC

Under-Voltage Lockout (UVLO)

The turn-on and turn-off thresholds are fixed internally

at 16.5V and 11.5V. During startup, the hold-up

capacitor must be charged to 16.5V through the startup

resistor to enable SG5851A. The hold-up capacitor

must not drop below 11.5V during the startup process.

This UVLO hysteresis window ensures that the hold-up

Gate Output

The BiCMOS output stage is a fast totem-pole gate

driver. Cross conduction has been avoided to minimize

heat dissipation, increase efficiency, and enhance

reliability. The output driver is clamped by an internal

17V Zener diode to protect power MOSFET transistors

against undesired over-voltage gate signals.

Built-in Slope Compensation

The sensed voltage across the current sense resistor is

used for current mode control and pulse-by-pulse

current limiting. Built-in slope compensation improves

stability and prevents sub-harmonic oscillations due to

peak-current-mode control. The SG5851A has a

synchronized, positively-sloped ramp built-in at each

switching cycle. The slope of the ramp is:

.)

(max

36

.

0

Duty

Duty

×

(2)

Noise Immunity

Noise from the current sense or the control signal can

cause significant pulse-width jitter, particularly in

continuous-conduction mode. While slope compensation

helps alleviate these problems, further precautions should

be taken. Good placement and layout practices should be

followed. Avoiding long PCB traces and component

leads, locating compensation and filter components near

the SG5851A, and increasing power MOS gate

resistance improve performance.