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FDD8447L Datasheet(PDF) 2 Page - Fairchild Semiconductor

Part # FDD8447L
Description  40V N-Channel PowerTrench짰 MOSFET 40V, 50A, 8.5m廓
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Manufacturer  FAIRCHILD [Fairchild Semiconductor]
Direct Link  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

FDD8447L Datasheet(HTML) 2 Page - Fairchild Semiconductor

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FDD8447L Rev.C
3
www.fairchildsemi.com
2
Electrical Characteristics T
J = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BVDSS
Drain to Source Breakdown Voltage
ID = 250µA, VGS = 0V
40
V
∆BVDSS
TJ
Breakdown Voltage Temperature
Coefficient
ID = 250µA, referenced to 25°C
35
mV/°C
IDSS
Zero Gate Voltage Drain Current
VDS = 32V, VGS = 0V
1
µA
IGSS
Gate to Source Leakage Current
VGS = ±20V, VGS = 0V
±100
nA
On Characteristics
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = 250µA
1.0
1.9
3.0
V
∆VGS(th)
TJ
Gate to Source Threshold Voltage
Temperature Coefficient
ID = 250µA, referenced to 25°C
-5
mV/°C
rDS(on)
Static Drain to Source On Resistance
VGS = 10V, ID = 14A
7.0
8.5
m
VGS = 4.5V, ID = 11A
8.5
11.0
VGS = 10V, ID = 14A, TJ=125°C
10.4
14.0
gFS
Forward Transconductance
VDS = 5V, ID = 14A
58
S
(Note 2)
Dynamic Characteristics
Ciss
Input Capacitance
VDS = 20V, VGS = 0V,
f = 1MHz
1970
pF
Coss
Output Capacitance
250
pF
Crss
Reverse Transfer Capacitance
150
pF
Rg
Gate Resistance
f = 1MHz
1.27
Switching Characteristics
td(on)
Turn-On Delay Time
VDD = 20V, ID = 1A
VGS = 10V, RGEN = 6Ω
12
21
ns
tr
Rise Time
12
21
ns
td(off)
Turn-Off Delay Time
38
61
ns
tf
Fall Time
9
18
ns
Qg(TOT)
Total Gate Charge, VGS = 10V
VDD = 20V, ID = 14A
VGS = 10V
37
52
nC
Qg(TOT)
Total Gate Charge, VGS = 5V
20
28
nC
Qgs
Gate to Source Gate Charge
6
nC
Qgd
Gate to Drain “Miller” Charge
7
nC
Drain-Source Diode Characteristics
Notes:
1: RθJA is the sum of the junction-to-case and case-to- ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.
RθJC is guaranteed by design while RθJA is determined by the user’s board design.
2: Pulse Test: Pulse Width < 300
µs, Duty cycle < 2.0%.
3:
Starting TJ = 25oC, L = 1mH, IAS = 17.5A, VDD = 40V, VGS = 10V.
4
a. 40°C/W when mounted on a 1 in2 pad of 2 oz copper
b. 96°C/W when mounted on a minimum pad.
----------------
IS
Maximum Continuous Drain-Source Diode Forward Current
(Note 1a)
2.6
A
VSD
Source to Drain Diode Forward Voltage
VGS = 0V, IS = 14A
(Note 2)
0.8
1.2
V
trr
Reverse Recovery Time
IF = 14A, di/dt = 100A/µs
22
ns
Qrr
Reverse Recovery Charge
11
nC


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