ACT4012A

Rev0, 16-May-08

Innovative Power

TM

- 6 -

www.active-semi.com

Copyright © 2008 Active-Semi, Inc.

STABILITY COMPENSATION

STEP 3. If the output capacitor’s ESR is high

enough to cause a zero at lower than 4 times the

cross over frequency, an additional compensation

pacitor has sufficiently low ESR, a small value

PCB layout parasitic effects.

Table 2 shows some calculated results based on

the compensation method above.

Table 2:

Typical Compensation for Different Output

Voltages and Output Capacitors

2.5V

22µF Ceramic

12kΩ

1.5nF

None

3.3V

22µF Ceramic

15kΩ

1.5nF

None

5V

22µF Ceramic

15kΩ

1.5nF

None

2.5V

47µF SP CAP

15kΩ

1.5nF

None

3.3V

47µF SP CAP

15kΩ

1.8nF

None

5V

47µF SP CAP

15kΩ

2.7nF

None

2.5V

470µF/6.3V/30mΩ

15kΩ

15nF

1nF

3.3V

470µF/6.3V/30mΩ

15kΩ

22nF

1nF

5V

470µF/6.3V/30mΩ

15kΩ

27nF

None

Figure 3 shows an example ACT4012A application circuit gener-

ating a 5V/1.5A output.

COMP

ESRCOUT

OUT

2

COMP

R

R

C

C

=

(13)

Figure 2:

Stability Compensation

(10)

(F)

COMP

5

COMP

R

10

8

.

1

C

−

×

=

(11)

(F)

OUT

OUT

5

COMP

C

V

10

2

.

1

C

−

×

=

The feedback system of the IC is stabilized by the

components at the COMP pin, as shown in Figure 2.

The DC loop gain of the system is determined by

the following equation:

Follow the following steps to compensate the IC:

STEP 1. Set the cross over frequency at 1/10 of the

The second pole P2 is the output pole:

COMP2

COMP

3

P

C

R

π

2

1

f

=

(8)

(Ω)

(9)

V

3

.

1

G

G

10

f

C

V

π

2

R

COMP

EA

SW

OUT

OUT

COMP

×

=

OUT

OUT

8

C

V

10

2

×

=

(4)

COMP

VEA

OUT

VDC

G

A

I

V

3

.

1

A

=

(5)

COMP

VEA

EA

1

P

C

A

π

2

G

f

=

(6)

OUT

OUT

OUT

2

P

C

V

π

2

I

f

=

(12)

(Ω)

⎟⎟

⎠

⎞

⎜⎜

⎝

⎛

×

×

≥

−

OUT

OUT

6

ESRCOUT

V

012

.

0

,

C

10

1

.

1

Min

R

(7)

COMP2

COMP

1

Z

C

R

π

2

1

f

=

ACT4012A

COMP

1