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ADS8318IBDGSR Datasheet(PDF) 3 Page - Texas Instruments |
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ADS8318IBDGSR Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 28 page  SPECIFICATIONS ADS8318 www.ti.com ........................................................................................................................................................................................................ SLAS568 – MAY 2008 TA = –40°C to 85°C, +VA = 5 V, +VBD = 5 V to 2.375 V, Vref = 4 V, fSAMPLE = 500 kHz (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT ANALOG INPUT Full-scale input span (1) +IN – (–IN) –Vref Vref V +IN – 0.1 Vref + 0.1 Operating input range –IN – 0.1 Vref + 0.1 Input common-mode range 0 Vref/2 Vref/2+0.1 V Input capacitance +IN and -IN terminal to GND 59 pF Input leakage current During acquisition 1000 pA SYSTEM PERFORMANCE Resolution 16 Bits No missing codes 16 Bits ADS8318I –1.5 ±0.65 1.5 INL Integral linearity(2) LSB(3) ADS8318IB –1 ±0.65 1 ADS8318I –1 ±0.4 1 DNL Differential linearity At 16-bit level LSB(3) ADS8318IB –0.75 ±0.4 0.75 EO Offset error(4) –1.5 ±0.3 1.5 mV EG Gain error –0.03 ±0.003 0.03 %FSR With common mode input signal = 200 mVp-p at 500 CMRR Common-mode rejection ratio 78 dB kHz PSRR Power supply rejection ratio At FFF0h output code 80 dB Transition noise 0.25 LSB SAMPLING DYNAMICS +VBD = 5 V 1400 tCONV Conversion time ns +VBD = 3 V 1400 +VBD = 5 V 600 Acquisition time ns +VBD = 3 V 600 Maximum throughput rate with or 0.5 MHz without latency Aperture delay 2.5 ns Aperture jitter, RMS 6 ps Step response 600 ns Settling to 16-bit accuracy Overvoltage recovery 600 ns (1) Ideal input span, does not include gain or offset error. (2) This is endpoint INL, not best fit. (3) LSB means least significant bit (4) Measured relative to actual measured reference. Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Link(s): ADS8318 |
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