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UCC2895PWTR Datasheet(PDF) 9 Page - Texas Instruments |
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UCC2895PWTR Datasheet(HTML) 9 Page - Texas Instruments |
9 / 25 page UCC1895 UCC2895 UCC3895 SLUS157L − DECEMBER 1999 − REVISED APRIL 2008 9 www.ti.com DETAILED PIN DESCRIPTION Adaptive Delay Set (ADS) This function sets the ratio between the maximum and minimum programmed output-delay dead time. When the ADS pin is directly connected to the CS pin, no delay modulation occurs. The maximum delay modulation occurs when ADS is grounded. In this case, delay time is four times longer when CS = 0 than when CS = 2.0 V (the peak-current threshold), ADS changes the output voltage on the delay pins DELAB and DELCD by the following formula: V DEL + 0.75 V CS * VADS ) 0.5 V where VCS and VADS are in volts. ADS must be limited to between 0 V and 2.5 V and must be less than or equal to CS. DELAB and DELCD are clamped to a minimum of 0.5 V. Current Sense (CS) The inverting input of the current-sense comparator and the non-inverting input of the overcurrent comparator and the ADS amplifier. The current sense signal is used for cycle-by-cycle current limiting in peak current mode control, and for overcurrent protection in all cases with a secondary threshold for output shutdown. An output disable initiated by an overcurrent fault also results in a restart cycle, called soft stop, with full soft start. Oscillator Timing Capacitor (CT) The UCC3895’s oscillator charges CT via a programmed current. The waveform on CT is a sawtooth, with a peak voltage of 2.35 V. The approximate oscillator period is calculated by the following formula: t OSC + 5 R T C T 48 ) 120 ns where CT is in Farads, and RT is in Ohms and tOSC is in seconds. CT can range from 100 pF to 880 pF. NOTE: A large CT and a small RT combination results in extended fall times on the CT waveform. The increased fall time increases the SYNC pulse width, hence limiting the maximum phase shift between OUTA, OUTB and OUTC, OUTD outputs, which limits the maximum duty cycle of the converter. (Refer to Figure 1) Delay Programming Between Complementary Outputs (DELAB, DELCD) DELAB programs the dead time between switching of OUTA and OUTB, and DELCD programs the dead time between OUTC and OUTD. This delay is introduced between complementary outputs in the same leg of the external bridge. The UCC2895N allows the user to select the delay, in which the resonant switching of the external power stages takes place. Separate delays are provided for the two half-bridges to accommodate differences in resonant-capacitor charging currents. The delay in each stage is set according to the following formula: t DELAY + (25 10*12) R DEL V DEL ) 25 ns where VDEL (V), and RDEL is in (Ω) and tDELAY is in seconds. DELAB and DELCD can source about 1 mA maximum. Choose the delay resistors so that this maximum is not exceeded. Programmable output delay is defeated by tying DELAB and/or DELCD to REF. For an optimum performance keep stray capacitance on these pins at less than 10 pF. (1) (2) (3) |
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