V62C1801024LL-70B datasheet(5/10 Pages) MOSEL

Part #	V62C1801024LL-70B

Description	Ultra Low Power 128K x 8 CMOS SRAM

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Manufacturer	MOSEL [Mosel Vitelic, Corp]

Direct Link	http://www.moselvitelic.com

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5 / 10 page

V62C1801024L(L)

Parameter

Symbol

Unit

Note

Read Cycle Time

tRC

70

-

85

-

100

-

150

-

ns

Address Access Time

tAA

-

70

-

85

-

100

-

150

ns

Chip Enable Access Time

tACE

-

70

-

85

-

100

-

150

ns

Output Enable Access Time

tOE

-

40

-

40

-

50

-

70

ns

OutputHold fromAddress Change

tOH

10

-

10

-

10

-

10

-

ns

Chip Enable to Output in Low-Z

tCLZ

10

-

10

-

10

-

10

-

ns

4,5

Chip Disable to Output in High-Z

tCHZ

-

30

-

35

-

40

-

50

ns

4,5

Output Enable to Output in Low-Z

tOLZ

5

-

5

-

5

-

5

-

ns

4,5

Output Disable to Output in High-Z

tOHZ

-

25

-

30

-

35

-

40

ns

4,5

Power-Up Time

tPU

0

-

0

-

0

-

0

-

ns

5

Power-Down Time

tPD

-

70

-

85

-

100

-

150

ns

5

Read Cycle (3,9) (Vcc = 1.8 to 2.2V, Gnd = 0V, TA = 0

0C to +700C / -400C to +850C)

Write Cycle (3,11) (Vcc = 1.8 to 2.2V, Gnd = 0V, TA = 0

0C to +700C / -400C to +850C)

Parameter

Symbol

Unit

Note

Write Cycle Time

tWC

70

-

85

-

100

-

150

-

ns

Chip Enable to Write End

tCW

60

-

70

-

80

-

120

-

ns

Address Setup to Write End

tAW

60

-

70

-

80

-

120

-

ns

Address Setup Time

tAS

0

-

0

-

0

-

0

-

ns

Write Pulse Width

tWP

50

-

60

-

70

-

100

-

ns

Write Recovering Time

tWR

0

-

0

-

0

-

0

-

ns

Data Valid to Write End

tDW

30

-

35

-

40

-

60

-

ns

Data Hold Time

tDH

0

-

0

-

0

-

0

-

ns

Write Enable to Output in High-Z

tWZ

-

30

-

35

-

40

-

50

ns

4,5

Output Active from Write End

tOW

5

-

5

-

5

-

5

-

ns

4,5

Min Max Min Max Min Max Min Max

-70

-85

-100

5

Min Max Min Max Min Max Min Max

-70

-85

-100

-150

REV. 1.1 April 2001 V62C1801024L(L)

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