SN54HCT377, SN74HCT377

OCTAL D-TYPE FLIP-FLOPS

WITH CLOCK ENABLE

SCLS067D – NOVEMBER 1988 – REVISED MARCH 2003

4

POST OFFICE BOX 655303

timing requirements over recommended operating free-air temperature range (unless otherwise

noted)

VCC

TA = 25°C

SN54HCT377

SN74HCT377

UNIT

VCC

MIN

MAX

MIN

MAX

MIN

MAX

UNIT

f lk

Clock frequency

4.5 V

25

17

20

MHz

fclock

Clock frequency

5.5 V

30

19

22

MHz

t

Pulse duration

CLK high or low

4.5 V

20

30

25

ns

tw

Pulse duration

CLK high or low

5.5 V

18

28

23

ns

↑

Data

4.5 V

12

18

15

t

Setup time before CLK

↑

Data

5.5 V

10

17

14

ns

tsu

Setup time before CLK

↑

CLKEN high or low

4.5 V

12

18

15

ns

CLKEN high or low

5.5 V

10

17

14

↑

Data

4.5 V

3

3

3

th

Hold time data after CLK

↑

Data

5.5 V

3

3

3

ns

th

Hold time data after CLK

↑

CLKEN inactive or active

4.5 V

5

5

5

ns

CLKEN inactive or active

5.5 V

5

5

5

otherwise noted) (see Figure 1)

FROM

TO

SN54HCT377

PARAMETER

FROM

(INPUT)

TO

(OUTPUT)

VCC

TA = 25°C

MIN

MAX

UNIT

(INPUT)

(OUTPUT)

MIN

TYP

MAX

MIN

MAX

f

4.5 V

25

31

17

MHz

fmax

5.5 V

30

37

19

MHz

t d

CLK

Any

4.5 V

15

30

45

ns

tpd

CLK

Any

5.5 V

12

28

40

ns

tt

Any

4.5 V

8

15

22

ns

tt

Any

5.5 V

6

14

21

ns

otherwise noted) (see Figure 1)

FROM

TO

SN74HCT377

PARAMETER

FROM

(INPUT)

TO

(OUTPUT)

VCC

TA = 25°C

MIN

MAX

UNIT

(INPUT)

(OUTPUT)

MIN

TYP

MAX

MIN

MAX

f

4.5 V

25

31

20

MHz

fmax

5.5 V

30

37

22

MHz

t d

CLK

Any

4.5 V

15

30

38

ns

tpd

CLK

Any

5.5 V

12

28

35

ns

tt

Any

4.5 V

8

15

19

ns

tt

Any

5.5 V

6

14

17

ns

PARAMETER

TEST CONDITIONS

TYP

UNIT

Cpd

Power dissipation capacitance

No load

30

pF

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design phase of development. Characteristic data and other

specifications are design goals. Texas Instruments reserves the right to

change or discontinue these products without notice.