ISPPACCLK5610AV-01TN100C datasheet(7/51 Pages) LATTICE

Part #	ISPPACCLK5610AV-01TN100C

Description	In-System Programmable, Enhanced Zero-Delay, Clock Generator with Universal Fan-Out Buffer

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Manufacturer	LATTICE [Lattice Semiconductor]

Direct Link	http://www.latticesemi.com

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Lattice Semiconductor

ispClock5600A Family Data Sheet

1-7

Electrical Characteristics – Differential SSTL2

Electrical Characteristics – Differential HSTL

Electrical Characteristics – Differential eHSTL

DC Electrical Characteristics – Input/Output Loading

Symbol

Parameter

Conditions

Min.

Typ.

Max.

Units

VCCO

Output Supply Voltage

2.375

2.5

2.625

V

VSWING(DC)

DC Differential Input Voltage Swing

-0.03

3.225

V

VSWING(AC)

AC Input Differential Voltage

0.62

3.225

V

VIX

Input Pair Differential Crosspoint

Voltage

VREF - 200 mV

VREF + 200 mV

V

TCKD

Clock Duty Cycle

Load Conditions

(Figure 1-6)

45

55

%

Symbol

Parameter

Conditions

Min

Typ

Max

Units

VCCO

Output Supply Voltage

1.425

1.5

1.575

V

VSWING(DC)

DC Differential Input Voltage Swing

-0.03

VCCD

V

VSWING(AC)

AC Input Differential Voltage

0.4

VCCD

V

VIX

Input Pair Differential Crosspoint

Voltage

0.68

0.9

V

TCKD

Clock Duty Cycle

Load Conditions

(Figure 1-6)

45

55

%

Symbol

Parameter

Conditions

Min

Typ

Max

Units

VCCO

Output Supply Voltage

1.7

1.8

1.9

V

VSWING(DC)

DC Differential Input Voltage Swing

-0.03

VCCD

V

VSWING(AC)

AC Input Differential Voltage

0.4

VCCD

V

VIX

Input Pair Differential Crosspoint

Voltage

0.68

0.9

V

TCKD

Clock Duty Cycle

Load Conditions

(Figure 1-6)

45

55

%

Symbol

Parameter

Conditions

Min.

Typ.

Max.

Units

ILK

Input Leakage

Note 1

—

±10

µA

IPU

Input Pull-up Current

Note 2

—

80

120

µA

IPD

Input Pull-down Current

Note 3

—

120

150

µA

IOLK

Tristate Leakage Output

Note 4

—

±10

µA

CIN

Input Capacitance

Notes 2, 3, 5

—

8

10

pF

Note 6

—

13.5

15

pF

1. Applies to clock reference inputs when termination ‘open’.

2. Applies to TDI, TMS inputs.

3. Applies to REFSEL, PS0, PS1, GOE, SGATE and PLL_BYPASS, FBKSEL, OEX, OEY.

4. Applies to all logic types when in tristated mode.

5. Applies to OEX, OEY, TCK, RESET inputs.

6. Applies to REFA+, REFA-, REFB+, REFB-, FBKA+, FBKA-, FBKB+, FBKB-.

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ISPPACCLK5610AV-01TN100C Datasheet(PDF) 7 Page - Lattice Semiconductor

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