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S9S08DV16SVLC Datasheet(PDF) 11 Page - Freescale Semiconductor, Inc |
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S9S08DV16SVLC Datasheet(HTML) 11 Page - Freescale Semiconductor, Inc |
11 / 414 page MC9S08DV60 Series Data Sheet, Rev 3 Freescale Semiconductor 11 Subject to Change Section Number Title Page 6.3.3 Pull-up/Pull-down Resistors .............................................................................................86 6.3.4 Pin Interrupt Initialization .................................................................................................86 6.4 Pin Behavior in Stop Modes.............................................................................................................86 6.5 Parallel I/O and Pin Control Registers .............................................................................................87 6.5.1 Port A Registers ................................................................................................................88 6.5.2 Port B Registers ................................................................................................................92 6.5.3 Port C Registers ................................................................................................................96 6.5.4 Port D Registers ................................................................................................................99 6.5.5 Port E Registers ...............................................................................................................103 6.5.6 Port F Registers ...............................................................................................................106 6.5.7 Port G Registers ..............................................................................................................109 Chapter 7 Central Processor Unit (S08CPUV3) 7.1 Introduction ....................................................................................................................................113 7.1.1 Features ...........................................................................................................................113 7.2 Programmer’s Model and CPU Registers ......................................................................................114 7.2.1 Accumulator (A) .............................................................................................................114 7.2.2 Index Register (H:X) .......................................................................................................114 7.2.3 Stack Pointer (SP) ...........................................................................................................115 7.2.4 Program Counter (PC) ....................................................................................................115 7.2.5 Condition Code Register (CCR) .....................................................................................115 7.3 Addressing Modes..........................................................................................................................117 7.3.1 Inherent Addressing Mode (INH) ...................................................................................117 7.3.2 Relative Addressing Mode (REL) ...................................................................................117 7.3.3 Immediate Addressing Mode (IMM) ..............................................................................117 7.3.4 Direct Addressing Mode (DIR) ......................................................................................117 7.3.5 Extended Addressing Mode (EXT) ................................................................................118 7.3.6 Indexed Addressing Mode ..............................................................................................118 7.4 Special Operations..........................................................................................................................119 7.4.1 Reset Sequence ...............................................................................................................119 7.4.2 Interrupt Sequence ..........................................................................................................119 7.4.3 Wait Mode Operation ......................................................................................................120 7.4.4 Stop Mode Operation ......................................................................................................120 7.4.5 BGND Instruction ...........................................................................................................121 7.5 HCS08 Instruction Set Summary ...................................................................................................122 Chapter 8 Multi-Purpose Clock Generator (S08MCGV1) 8.1 Introduction ....................................................................................................................................133 8.1.1 Features ...........................................................................................................................135 8.1.2 Modes of Operation ........................................................................................................137 |
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