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EMIF10-COM01F2 Datasheet(PDF) 4 Page - STMicroelectronics |
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EMIF10-COM01F2 Datasheet(HTML) 4 Page - STMicroelectronics |
4 / 7 page Application information EMIF10-COM01F2 4/7 2 Application information Figure 9. Aplac model 2.1 PCB grounding recommendations In order to ensure a good efficiency in terms of ESD protection and filtering behavior, we recommend to implement microvias (100 µm dia.) between the GND bumps and the GND layer. GND bumps can be connected together in PCB layer 1, and in addition, if possible, use through hole vias (200 µm dia.) in both sides of filter to improve contact to GND (layer). This layout will minimize the distance to the ground and thus parasitic inductances. In addition, we recommend to have GND plane wherever possible. 3 Ordering information scheme Figure 10. Ordering information scheme Demif10 model BV = 7 IBV = 1m CJO = 25p M = 0.3333 RS = 1 VJ = 0.6 TT = 100n out in 200R MODEL = demif10 MODEL = demif10 sub EMIF yy - xxx zz Fx EMI Filter Number of lines Information Package x = resistance value (Ohms) z = capacitance value / 10(pF) or 3 letters = application 2 digits = version F = Flip Chip x = 2: Lead-free, pitch = 500 µm, bump = 315 µm |
Similar Part No. - EMIF10-COM01F2_08 |
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Similar Description - EMIF10-COM01F2_08 |
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