Pin settings

54VCXH162373

6/17

2.2

Pin description

2.3

Truth table

Note:

X = Do not care; Z = High Impedance

Table 1. Pin description

Pin N°

Symbol

Name and function

11OE

3 state output enable input (Active

LOW)

2, 3, 5, 6, 8, 9, 11, 12

1Q0 to 1Q7

3-state outputs

13, 14, 16, 17, 19, 20, 22, 23

2Q0 to 2Q7

3-state outputs

24

2OE

3 state output enable input (Active

LOW)

25

2LE

Latch enable input

36, 35, 33, 32, 30, 29, 27, 26

2D0 to 2D7

Data inputs

47, 46, 44, 43, 41, 40, 38, 37

1D0 to 1D7

Data inputs

48

1LE

Latch enable input

4, 10, 15, 21, 28, 34, 39, 45

GND

Ground (0V)

7, 18, 31, 42

Positive supply voltage

Table 2. Truth table

Inputs

Output

OE

LE

D

Q

HX

X

Z

LL

X

1.

Q outputs are latched at the time when the LE input is taken low logic level.

LHL

L

LH

H

H