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STTS424E02CDA3E Datasheet(PDF) 5 Page - STMicroelectronics |
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STTS424E02CDA3E Datasheet(HTML) 5 Page - STMicroelectronics |
5 / 51 page STTS424E02 List of figures 5/51 List of figures Figure 1. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Figure 2. DFN8 and TDFN8 connections (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Figure 3. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Figure 4. SMBus/I2C write to pointer register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 5. SMBus/I2C write to pointer register, followed by a read data word. . . . . . . . . . . . . . . . . . . 12 Figure 6. SMBus/I2C write to pointer register, followed by a write data word . . . . . . . . . . . . . . . . . . 13 Figure 7. SMBus/I2C timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 8. Hysteresis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 9. Event output boundary timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Figure 10. Result of setting the write protection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Figure 11. Setting the write protection (WC = 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Figure 12. Write mode sequences in a non write-protected area of SPD . . . . . . . . . . . . . . . . . . . . . . 32 Figure 13. Write cycle polling flowchart using ACK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Figure 14. Read mode sequences - SPD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Figure 15. DFN8 – 8-lead dual flat, no-lead (2 mm x 3 mm) package outline (DA) . . . . . . . . . . . . . . . 42 Figure 16. TDFN8 – 8-lead thin dual flat, no-lead (2 mm x 3 mm) package outline (DN) . . . . . . . . . . 44 Figure 17. DA package topside marking information (DFN-8L) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 Figure 18. DN package topside marking information (TDFN-8L). . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 Figure 19. Landing pattern - TDFN package (DN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 |
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