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V62C1162048L-85T Datasheet(PDF) 9 Page - Mosel Vitelic, Corp |
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V62C1162048L-85T Datasheet(HTML) 9 Page - Mosel Vitelic, Corp |
9 / 11 page V62C1162048L(L) 9 Notes (Write Cycle) 1. L-version includes this feature. 2. This Parameter is samples and not 100% tested. 3. For test conditions, see AC Test Condition, Figure A. 4. This parameter is tested with CL = 5pF as shown in Figure B. Transition is measured + 500mV from steady-state voltage. 5. This parameter is guaranteed, but is not tested. 6. WE is High for read cycle. 7. CE and OE are LOW for read cycle. 8. Address valid prior to or coincident with CE transition LOW. 9. All read cycle timings are referenced from the last valid address to the first transtion address. 10. CE or WE must be HIGH during address transition. 11. All write cycle timings are referenced from the last valid address to the first transition address. Data Retention Mode V DR > 1.0V Vcc_typ VIH VIH VDR V CC CE t R t CDR Vcc_typ Data Retention Waveform (L Version Only) (TA = 0 0C to +700C / -400C to +850C) Data Retention Characteristics (L Version Only)(1) Parameter Symbol Test Condition Min Max Unit VCC for Data Retention VDR CE > VCC - 0.2V 1.0 - V Data Retention Current ICCDR - 1 µA Chip Deselect to Data Retention Time tCDR VIN > VCC - 0.2V or 0 - ns Operation Recovery Time(2) tR VIN < 0.2V tRC - ns REV. 1.2 May 2001 V62C1162048L(L) |
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