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HC6856NVFZC35 Datasheet(PDF) 11 Page - Honeywell Solid State Electronics Center |
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HC6856NVFZC35 Datasheet(HTML) 11 Page - Honeywell Solid State Electronics Center |
11 / 12 page HC6856 11 VDD = 6.5V, R ≤ 10 KΩ, VIH = VDD, VIL = VSS Ambient Temperature ≥ 125 °C, F0 ≥ 100 KHz Sq Wave Frequency of F1 = F0/2, F2 = F0/4, F3 = F0/8, etc. VDD = 5.5V, R ≤ 10 KΩ Ambient Temperature ≥ 125 °C STATIC BURN-IN DIAGRAM DYNAMIC BURN-IN DIAGRAM 28-LEAD FLAT PACK (22017362-001) For 28-Lead DIP description, see MIL-STD-1835, Type CDIP2-T28, Config. C, Dimensions D-10 28-LEAD DIP (22017502-001) [1] BSC - Basic lead spacing between centers [2] Where lead is brazed to package [3] Parts delivered with leads unformed [4] Lid connected to VSS A b C D e E E2 E3 F G L Q S U V W X Y Z 0.135 ± 0.015 0.015 ± 0.002 0.004 to 0.009 0.720 ± 0.008 0.050 ± 0.005 [1] 0.530 ± 0.008 0.420 ± 0.008 0.055 ref 0.650 ± 0.005 [2] 0.050 ± 0.005 0.295 min [3] 0.026 to 0.045 0.035 ± 0.010 0.065 ref 0.300 ref 0.050 ref 0.030 ref 0.100 ref 0.080 ref All dimensions in inches E2 A Lead Alloy 42 Ceramic Body C E3 G Cutout Area Q Kovar Lid [4] V 1 X W Y BOTTOM VIEW VSS VDD VDD Optional capacitors in cutout S Z U E 1 e b (width) (pitch) L TOP VIEW R R R R R R R R R R R R R R R R R R R R R R R R R R R NC VSS VDD NWE* CE* A13* A8 A9 A11 NOE A10 NCS DQ7 DQ6 DQ5 DQ4 DQ3 VDD VSS VDD VSS VDD A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 DQO DQ1 DQ2 VDD VSS VSS VSS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 NOTE — *Denotes package pinout option dependent (28-Lead DIP/FP diagrams not shown but have similar connections) R R R R R R R R R R R R R NC R R R R R R R R R R R R R R 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 VSS VDD NWE* CE* A13* A8 A9 A11 NOE A10 NCS DQ7 DQ6 DQ5 DQ4 DQ3 VDD VSS VSS VDD VSS VDD A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 DQO DQ1 DQ2 VDD VSS F16 F7 F6 F5 F4 F3 F2 F8 F13 F14 F1 F1 F1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 F0 F17 F15 F12 F11 F10 F17 F9 F17 F1 F1 F1 F1 F1 VSS |
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