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HC6856NQHZC60 Datasheet(PDF) 7 Page - Honeywell Solid State Electronics Center |
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HC6856NQHZC60 Datasheet(HTML) 7 Page - Honeywell Solid State Electronics Center |
7 / 12 page HC6856 7 Worst Case (3) (1) Test conditions: input switching levels VIL/VIH=0.5V/VDD-0.5V (CMOS), VIL/VIH=0V/3V (TTL), input rise and fall times <1 ns/V, input and output timing reference levels shown in the Tester AC Timing Characteristics table, capacitive output loading0 pF, or equivalent capacitive load of 5 pF for TWLQZ. (2) Typical operating conditions: VDD=5.0 V, TA=25 °C, pre-radiation. (3) Worst case operating conditions: VDD=4.5 V to 5.5 V, -55 to 125 °C, post total dose at 25°C. (4) SER ≤1E-10 u/b-d from -55 to 80°. (5) TAVAVW= TWLWH + TWHWL TAVAVW Write Cycle Time (5) 30 40 60 ns TWLWH Write Enable Write Pulse Width 25 35 55 ns TSLWH Chip Select to End of Write Time 25 35 55 ns TDVWH Data Valid to End of Write Time 20 30 50 ns TAVWH Address Valid to End of Write Time 25 35 55 ns TWHDX Data Hold Time after End of Write Time 0 0 0 ns TAVWL Address Valid Setup to Start of Write Time 0 0 0 ns TWHAX Address Valid Hold after End of Write Time 0 0 0 ns TWLQZ Write Enable to Output Disable Time 5 0 10 0 10 ns TWHQX Write Disable to Output Enable Time 15 5 5 ns TWHWL Write Disable to Write Enable Pulse Width 4 5 5 ns TEHWH Chip Enable to End of Write Time 25 35 55 ns Symbol Parameter Typical (2) SER <1E-9 (4) SER <1E-10 Min Max Min Max Units WRITE CYCLE AC TIMING CHARACTERISTICS (1) ADDRESS HIGH IMPEDANCE DATA OUT NWE DATA IN DATA VALID TAVAVW NCS CE TAVWH TWLWH TAVWL TWLQZ TDVWH TWHQX TWHDX TSLWH TEHWH TWHAX TWHWL |
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