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www.johanson dielectrics.com
LOW INDUCTANCE CHIP CAPACITORS
These MLC capacitors are specially designed to lower
inductance by altering the aspect ratio of the termination
in conjunction with improved conductivity of the electrodes.
This inherent low ESL and ESR design improves the
capacitor circuit performance by lowering the current
change noise pulse and voltage drop. The system will
benefit by lower power consumption, increased efficiency,
and higher operating speeds.
FEATURES
• Low ESL
• Low ESR
• High Resonant Frequency
• Small Size
APPLICATIONS
• High Speed Microprocessors
• AC Noise Reduction in multi-chip modules (MCM)
• High speed digital equipment
HOW TO ORDER LOW INDUCTANCE
P/N written: 500B18W473KV4E
Dielectric specifications are listed on page 28 & 29.
VOLTAGE
160 = 16 V
250 = 25 V
500 = 50 V
MARKING
4 = Unmarked
DIELECTRIC
N = NPO
W = X7R
Z = Z5U
CAPACITANCE
1st two digits are
significant; third digit
denotes number of
zeros.
474 = 0.47 µF
105 = 1.00 µF
TERMINATION
V = Nickel Barrier
TAPE MODIFIER
Code
Type
Reel
E
Plastic
7"
U
Plastic
13"
T
Paper
7"
R
Paper
13"
Tape specs. per EIA RS481
TOLERANCE
J= ± 5%
K = ± 10%
M = ± 20%
Z = +80% -20%
CASE SIZE
B15 = 0508
B18 = 0612
E
4
V
W
B18
500
473
K
B18 / 0612
Inches
(mm)
.062 ±.010
(1.57 ±.25)
.125 ±.010
(3.17 ±.25)
.060 Max.
(1.52)
.010 ±.005
(0.25±.13)
L
W
T
E/B
B15 / 0508
Inches
(mm)
.050 ±.010
(1.27 ±.25)
.080 ±.010
(2.03 ±.25)
.050 Max.
(1.27)
.010 ±.005
(0.25±.13)
L
W
T
E/B
50 V
25 V
16 V
50 V
25 V
16 V
CAPACITANCE SELECTION
DIELECTRIC
NPO
X7R
Z5U