LM3S328 Data Sheet
October 8, 2006
5
Preliminary
10.5
Register Descriptions......................................................................................................................... 175
11.
Analog-to-Digital Converter (ADC) .................................................................................. 196
11.1
Block Diagram ................................................................................................................................... 196
11.2
Functional Description ....................................................................................................................... 197
11.2.1 Sample Sequencers .......................................................................................................................... 197
11.2.2 Module Control .................................................................................................................................. 198
11.2.3 Hardware Sample Averaging Circuit.................................................................................................. 198
11.2.4 Analog-to-Digital Converter ............................................................................................................... 198
11.2.5 Test Modes ........................................................................................................................................ 198
11.2.6 Internal Temperature Sensor ............................................................................................................. 199
11.3
Initialization and Configuration........................................................................................................... 199
11.3.1 Module Initialization ........................................................................................................................... 199
11.3.2 Sample Sequencer Configuration ...................................................................................................... 199
11.4
Register Map ..................................................................................................................................... 200
11.5
Register Descriptions......................................................................................................................... 201
12.
Universal Asynchronous Receivers/Transmitters (UARTs).......................................... 226
12.1
Block Diagram ................................................................................................................................... 227
12.2
Functional Description ....................................................................................................................... 227
12.2.1 Transmit/Receive Logic ..................................................................................................................... 227
12.2.2 Baud-Rate Generation ....................................................................................................................... 228
12.2.3 Data Transmission ............................................................................................................................. 229
12.2.4 FIFO Operation .................................................................................................................................. 229
12.2.5 Interrupts............................................................................................................................................ 229
12.2.6 Loopback Operation .......................................................................................................................... 230
12.3
Initialization and Configuration........................................................................................................... 230
12.4
Register Map ..................................................................................................................................... 231
12.5
Register Descriptions......................................................................................................................... 232
13.
Synchronous Serial Interface (SSI) ................................................................................. 262
13.1
Block Diagram ................................................................................................................................... 262
13.2
Functional Description ....................................................................................................................... 263
13.2.1 Bit Rate Generation ........................................................................................................................... 263
13.2.2 FIFO Operation .................................................................................................................................. 263
13.2.3 Interrupts............................................................................................................................................ 263
13.2.4 Frame Formats .................................................................................................................................. 264
13.3
Initialization and Configuration........................................................................................................... 271
13.4
Register Map ..................................................................................................................................... 272
13.5
Register Descriptions......................................................................................................................... 273
14.
Inter-Integrated Circuit (I2C) Interface ............................................................................ 297
14.1
Block Diagram ................................................................................................................................... 297
14.2
Functional Description ....................................................................................................................... 297
14.2.1 I2C Bus Functional Overview ............................................................................................................. 298
14.2.2 Available Speed Modes ..................................................................................................................... 305
14.3
Initialization and Configuration........................................................................................................... 306
14.4
Register Map ..................................................................................................................................... 306
14.5
Register Descriptions (I2C Master).................................................................................................... 307
14.6
Register Descriptions (I2C Slave)...................................................................................................... 321