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MAC7134 Datasheet(PDF) 5 Page - Freescale Semiconductor, Inc |
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MAC7134 Datasheet(HTML) 5 Page - Freescale Semiconductor, Inc |
5 / 16 page Features MAC7100 Microcontroller Family Product Brief, Rev. 2 Preliminary Freescale Semiconductor 5 – Protection violation flag – 10,000 program / erase cycle endurance – 15-year data retention — 32 Kbyte data Flash EEPROM – 16-bit wide memory accessed via peripheral bus interface – Relocatable to page zero to provide data Flash boot operation – State machine controlled program/erase operations – Internal programming voltage generator – Up to 8 protected sectors in the data Flash – 10,000 program / erase cycle endurance – 15-year data retention — Up to 48 Kbyte RAM – Single cycle accesses to RAM for byte, halfword, and word reads and writes • Interrupt Controller (INTC) — 64 vectored interrupt sources — 44 peripheral, 17 DMA, 1 software watchdog timer, 2 external sources — 16 programmable interrupt priorities for every source, even in low-power modes — Multiple level interrupt nesting, with hardware support for first nesting level — Normal and Fast interrupt support • General purpose input/output — Up to 144 port pins shared with peripherals — All ports are 16 bits wide, with pins bidirectional and independently selectable — Wake-up interrupt available on all port pins • Analog-to-Digital Converter(s) (ATD) — One or two ATD modules — 16 analog input channels per ATD module — 10-bit resolution with ± 2 counts accuracy —7 µS minimum conversion time — Internal sample and hold circuitry — Programmable input sample time for various source impedances — Queued conversion sequences supported by eDMA controller — Unused analog channels can be used as digital I/O — External and on-chip sample triggers, including periodic triggering via the PIT module — Synchronized sampling between ATD modules using external or on-chip triggers • CAN 2.0 software compatible modules (FlexCAN) — Up to four CAN modules — Full implementation of the CAN 2.0 protocol specification — Programmable bit rate up to 1M bps — Up to 32 flexible message buffers of 0 to 8 bytes data length for each module — All message buffers configurable for either Rx/Tx — Unused message buffer space can be used as general purpose RAM — Supports standard or extended messages — Time stamp, based on a 16-bit free-running counter |
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