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AT89S8252-24QC Datasheet(PDF) 5 Page - ATMEL Corporation |
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AT89S8252-24QC Datasheet(HTML) 5 Page - ATMEL Corporation |
5 / 34 page AT89S8252 5 gram memory locations starting at 0000H up to FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset. EA should be strapped to V CC for internal program execu- tions. This pin also receives the 12-volt programming enable voltage (V PP) during Flash programming when 12- volt programming is selected. XTAL1 Input to the inverting oscillator amplifier and input to the internal clock operating circuit. XTAL2 Output from the inverting oscillator amplifier. Table 1. AT89S8252 SFR Map and Reset Values 0F8H 0FFH 0F0H B 00000000 0F7H 0E8H 0EFH 0E0H ACC 00000000 0E7H 0D8H 0DFH 0D0H PSW 00000000 SPCR 000001XX 0D7H 0C8H T2CON 00000000 T2MOD XXXXXX00 RCAP2L 00000000 RCAP2H 00000000 TL2 00000000 TH2 00000000 0CFH 0C0H 0C7H 0B8H IP XX000000 0BFH 0B0H P3 11111111 0B7H 0A8H IE 0X000000 SPSR 00XXXXXX 0AFH 0A0H P2 11111111 0A7H 98H SCON 00000000 SBUF XXXXXXXX 9FH 90H P1 11111111 WMCON 00000010 97H 88H TCON 00000000 TMOD 00000000 TL0 00000000 TL1 00000000 TH0 00000000 TH1 00000000 8FH 80H P0 11111111 SP 00000111 DP0L 00000000 DP0H 00000000 DP1L 00000000 DP1H 00000000 SPDR XXXXXXXX PCON 0XXX0000 87H |
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