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ADN2873ACPZ-RL Datasheet(PDF) 4 Page - Analog Devices |
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ADN2873ACPZ-RL Datasheet(HTML) 4 Page - Analog Devices |
4 / 20 page ADN2873 Rev. 0 | Page 4 of 20 Parameter Min Typ Max Unit Conditions/Comments IBMON, IMMON DIVISION RATIO IBIAS/IBMON3 76 98 112 A/A 2 mA < IBIAS < 11 mA IBIAS/IBMON3 85 98 115 A/A 11 mA < IBIAS < 50 mA IBIAS/IBMON3 92 100 108 A/A 50 mA < IBIAS < 100 mA IBIAS/IBMON STABILITY3, 10 ±5 % 10 mA < IBIAS < 100 mA IMOD/IMMON 42 A/A IBMON Compliance Voltage 0 1.3 V SUPPLY ICC11 31 mA When IBIAS = IMOD = 0 mA VCC (with Respect to GND)12 3.0 3.3 3.6 V 1 Temperature range is from −40°C to +85°C. 2 Measured into a single-ended 15 Ω load (22 Ω resistor in parallel with digital scope 50 Ω input) using a 1111111100000000 pattern at 2.5 Gbps, shown in Figure 2. 3 Guaranteed by design and characterization. Not production tested. 4 Measured into a single-ended 15 Ω load using a K28.5 pattern at 2.5 Gbps, shown in Figure 2. 5 Measured into a differential 30 Ω (43 Ω differential resistor in parallel with a digital scope of 50 Ω input) load using a 1111111100000000 pattern at 4.25 Gbps, as shown in Figure 3. 6 Measured into a differential 30 Ω load using a K28.5 pattern at 4.25 Gbps, as shown in Figure 3. 7 Measured into a differential 30 Ω load using a K28.5 pattern at 2.7 Gbps, as shown in Figure 3. 8 When the voltage on DATAP is greater than the voltage on DATAN, the modulation current flows into the IMODP pin. 9 Guaranteed by design. Not production tested. 10 IBIAS/IBMON ratio stability is defined in SFF-8472 Revision 9 over temperature and supply variation. 11 See the ICC minimum for power calculation in the Power Consumption section. 12 All VCC pins should be shorted together. ADN2873 IMODP BIAS TEE 80kHz → 27GHz VCC VCC TO HIGH SPEED DIGITAL OSCILLOSCOPE 50Ω INPUT R 22Ω C L Figure 2. High Speed Electrical Test Single-Ended Output Circuit ADN2873 IMODN BIAS TEE 80kHz → 27GHz VCC TO HIGH SPEED DIGITAL OSCILLOSCOPE 50Ω DIFFERENTIAL INPUT R 43Ω C L VCC IMODP L C BIAS TEE 80kHz → 27GHz Figure 3. High Speed Electrical Test Differential Output Circuit |
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