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ONET1101LRGERG4 Datasheet(PDF) 2 Page - Texas Instruments |
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ONET1101LRGERG4 Datasheet(HTML) 2 Page - Texas Instruments |
2 / 26 page www.ti.com BLOCK DIAGRAM + + Limiter DC Offset Cancellation Equalizer Output Driver Boost 100 W Equalizer 7 Bit + Sign 8 Bit Register 10 Bit Register 10 Bit Register 8 Bit Register CP Adjust IMOD IBIAS Settings CP Adjust CP Adjust 2-Wire Interface and Control Logic SDA SCK DIS COMP MONB MONP FLT PD BIAS DIN+ DIN– SDA SCK DIS MOD+ MOD– BIAS MONB MONP FLT PD COMP RZTC RZTC 4 Bit Register Settings 3 Bit + Sign Limiter Current HC Enable 1 Bit Power-On Reset Adjustable Boost Bias Current Generator and APC Band-Gap and Analog References B0285-01 PACKAGE ONET1101L SLLS883 – MARCH 2008 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Figure 1 shows a block diagram of the ONET1101L device. The laser driver consists of an equalizer, a limiter, an output driver, DC offset cancellation with cross point control, power-on reset circuitry, a 2-wire serial interface (including a control logic block and modulation current generator), a bias current generator and automatic power control loop, and an analog reference block. Figure 1. Block Diagram of the ONET1101L The ONET1101L is packaged in a small footprint 4mm × 4mm 24-pin, RoHS-compliant QFN package, with a lead pitch of 0.5 mm. The 24-pin QFN Package top view and pin description follow. 2 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s) :ONET1101L |
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