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THS7374IPW Datasheet(PDF) 7 Page - Texas Instruments |
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THS7374IPW Datasheet(HTML) 7 Page - Texas Instruments |
7 / 37 page PIN CONFIGURATION 1 2 3 4 5 6 7 14 13 12 11 10 9 8 CH1OUT CH2OUT CH3OUT CH4OUT V S+ BYPASS NC CH1IN CH2IN CH3IN CH4IN GND DISABLE NC THS7374IPW THS7374 www.ti.com....................................................................................................................................................................................................... SLOS590 – JULY 2008 PW PACKAGE TSSOP-14 TOP VIEW Table 1. TERMINAL FUNCTIONS TERMINAL NAME NO. I/O DESCRIPTION CH1 IN 1 I Video input; channel 1 CH2 IN 2 I Video input; channel 2 CH3 IN 3 I Video input; channel 3 CH4 IN 4 I Video input; channel 4 GND 5 I Ground pin for all internal circuitry Disable pin. Logic high disables the part; logic low enables the part. This pin must not be left DISABLE 6 I floating. It must be connected to a defined logic state (or GND or VS+). NC 7, 8 — No internal connection Internal filter bypass. Logic high bypasses the internal low-pass filter; logic low uses the BYPASS 9 I internal filters. This pin must not be left floating. It must be connected to a defined logic state (or GND or VS+). VS+ 10 I Positive power-supply pin; connect to +3 V to +5 V CH4 OUT 11 O Video output; channel 4 CH3 OUT 12 O Video output; channel 3 CH2 OUT 13 O Video output; channel 2 CH1 OUT 14 O Video output; channel 1 Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Link(s): THS7374 |
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