MC74HC125A MC74HC126A

High–Speed CMOS Logic Data

DL129 — Rev 6

3

MOTOROLA

Guaranteed Limit

Unit

v 125_C

v 85_C

– 55 to

25

_C

VCC

V

Test Conditions

Parameter

Symbol

Iin

Maximum Input Leakage Current

Vin = VCC or GND

6.0

± 0.1

± 1.0

± 1.0

µA

IOZ

Maximum Three–State Leakage

Current

Output in High–Impedance State

Vin = VIL or VIH

Vout = VCC or GND

6.0

± 0.5

± 5.0

± 10

µA

ICC

Maximum Quiescent Supply

Current (per Package)

Vin = VCC or GND

Iout = 0 µA

6.0

4.0

40

160

µA

NOTE: Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).

Sb l

P

V

Guaranteed Limit

Ui

Symbol

Parameter

VCC

V

– 55 to

25

_C

v 85_C

v 125_C

Unit

tPLH,

tPHL

Maximum Propagation Delay, Input A to Output Y

(Figures 1 and 3)

2.0

3.0

4.5

6.0

90

36

18

15

115

45

23

20

135

60

27

23

ns

tPLZ,

tPHZ

Maximum Propagation Delay, Output Enable to Y

(Figures 2 and 4)

2.0

3.0

4.5

6.0

120

45

24

20

150

60

30

26

180

80

36

31

ns

tPZL,

tPZH

Maximum Propagation Delay, Output Enable to Y

(Figures 2 and 4)

2.0

3.0

4.5

6.0

90

36

18

15

115

45

23

20

135

60

27

23

ns

tTLH,

tTHL

Maximum Output Transition Time, Any Output

(Figures 1 and 3)

2.0

3.0

4.5

6.0

60

22

12

10

75

28

15

13

90

34

18

15

ns

Cin

Maximum Input Capacitance

—

10

10

10

pF

Cout

Maximum Three–State Output Capacitance

(Output in High–Impedance State)

—

15

15

15

pF

NOTE: For propagation delays with loads other than 50 pF, and information on typical parametric values, see Chapter 2 of the Motorola High–

Speed CMOS Data Book (DL129/D).

C

PDi

i

i

C

i

(P

B ff )*

Typical @ 25

°C, VCC = 5.0 V

F

CPD

Power Dissipation Capacitance (Per Buffer)*

30

pF

* Used to determine the no–load dynamic power consumption: PD = CPD VCC2f + ICC VCC. For load considerations, see Chapter 2 of the

Motorola High–Speed CMOS Data Book (DL129/D).