Rev 0.3

EMLS232TA Series

512K x 32 x 4Banks Low Power SDRAM

512K x 32Bit x 4 Banks Low Power SDRAM

ORDERING INFORMATION

1. In case of 40

Frequency, CL1 can be supported.

2. Ramsway are not designed or manufactured for use in a device or system that is used under circumstance in which human life is

potentially at stake. Please contact to the memory marketing team in ramsway when considering the use of a product

contained herein for any specific purpose, such as medical,aerospace, nuclear, military, vehicular or undersea repeater use.

Part No.

Max Freq.

Interface

Package

EMLS232TAW-6(E)

133 (CL3), 100 (CL2)

LVCMOS

Wafer Biz.

FEATURES

2.8V power supply.

LVCMOS compatible with multiplexed address.

Four banks operation.

MRS cycle with address key programs.

-. CAS latency (1, 2 & 3).

-. Burst length(1, 2, 4, 8 & Full page).

-. Burst type (Sequential & Interleave).

EMRS cycle with address key programs.

All inputs are sampled at the positive going edge of the system

clock.

Burst read single-bit write operation.

Special Function Support.

. PASR(Partial Array Self Refresh).

. DS (Driver Strength)

. Deep power down

DQM for masking.

Auto refresh.

64

refresh period (4K cycle).

Commercial Temperature Operation (-0

~ 70 )

Extended Temperature Operation (-25

~ 85 )

GENERAL DESCRIPTION

The EMLS232TA series is 67,108,864 bits synchronous high data

rate Dynamic RAM organized as 4 x 534,288 words by 32 bits,

fabricated with Ramsway’s high performance CMOS technology.

Synchronous design allows precise cycle control with the use of

system clock and I/O transactions are possible on every clock

cycle. Range of operating frequencies, programmable burst

lengths and programmable latencies allow the same device to be

useful for a variety of high bandwidth and high performance mem-

ory system applications.