EM7320FV8BW-70LF datasheet(8/11 Pages) EMLSI

Part #	EM7320FV8BW-70LF

Description	512K x16 bit Low Power and Low Voltage Full CMOS Static RAM

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Manufacturer	EMLSI [Emerging Memory & Logic Solutions Inc]

Direct Link	http://www.emlsi.com

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8 / 11 page

EM681FU16 Series

Low Power, 512Kx16 SRAM

8

merging Memory & Logic Solutions Inc.

tWC

Address

CS

UB ,LB

WE

Data in

Data out

t

CW(2)

tWR(4)

tAW

tBW

tWP(1)

tDW

tDH

TIMING WAVEFORM OF WRITE CYCLE(3) (UB, LB CONTROLLED)

High-Z

Data Valid

tAS(3)

NOTES (WRITE CYCLE)

1. A write occurs during the overlap(tWP) of low CS and low WE. A write begins when CS goes low and WE

goes low with asserting UB or LB for single byte operation or simultaneously asserting UB and LB for double

byte operation. A write ends at the earliest transition when CS goes high and WE goes high. The tWP is

measured from the beginning of write to the end of write.

2. tCW is measured from the CS going low to end of write.

3. tAS is measured from the address valid to the beginning of write.

4. tWR is measured from the end or write to the address change. tWR applied in case a write ends as CS

or WE going high.

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