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ST72T121J4T6S Datasheet(PDF) 7 Page - STMicroelectronics |
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ST72T121J4T6S Datasheet(HTML) 7 Page - STMicroelectronics |
7 / 92 page 7/92 ST72E121 ST72T121 1.3 EXTERNAL CONNECTIONS The following figure shows the recommended ex- ternal connections for the device. The VPP pin is only used for programming OTP and EPROM devices and must be tied to ground in user mode. The 10 nF and 0.1 µF decoupling capacitors on the power supply lines are a suggested EMC per- formance/cost tradeoff. The external reset network is intended to protect the device against parasitic resets, especially in noisy environments. Unused I/Os should be tied high to avoid any un- necessary power consumption on floating lines. An alternative solution is to program the unused ports as inputs with pull-up. Figure 4. Recommended External Connections VPP VDD VSS OSCIN OSCOUT RESET VDD 0.1 µF + See Clocks Section VDD 0.1 µF 0.1 µF EXTERNAL RESET CIRCUIT Or configure unused I/O ports Unused I/O 10nF 4.7K 10K by software as input with pull-up VDD Detector (LVD) is used Optional if Low Voltage 7 |
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