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IRS2132D Datasheet(PDF) 11 Page - International Rectifier |
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IRS2132D Datasheet(HTML) 11 Page - International Rectifier |
11 / 23 page www.irf.com 11 IRS2130D/IRS21303D/IRS2132D (J&S)PbF 1 Features Description 1.1 Integrated Bootstrap Functionality The IRS213(0,03,2)D family embeds an integrated bootstrap FET that allows an alternative drive of the bootstrap supply for a wide range of applications. There is one bootstrap FET for each channel and it is connected between each of the floating supply (VB1, VB2, VB3) and VCC (see Fig. 7). The bootstrap FET of each channel follows the state of the respective low side output stage (i.e., bootFet is ON when LO is high, it is OFF when LO is low), unless the VB voltage is higher than approximately 1.1(VCC). In that case the bootstrap FET stays off until the VB voltage returns below that threshold (see Fig. 8). Fig. 7. Simplified BootFet Connection Vcc=15V Vth~17V LO BootFet ON BootFet OFF BootFet ON Bootstrap FET state Phase voltage Fig. 8. State Diagram Bootstrap FET is suitable for most PWM modulation schemes and can be used either in parallel with the external bootstrap network (diode + resistor) or as a replacement of it. The use of the integrated bootstrap as a replacement of the external bootstrap network may have some limitations in the following situations: - when used in non-complementary PWM schemes (typically 6-step modulations) - at a very high PWM duty cycle due to the bootstrap FET equivalent resistance (RBS, see page 4). In these cases, better performances can be achieved by using the IRS213(0,03,2) non D version with an external bootstrap network. 2 PCB Layout Tips 2.1 Distance from H to L Voltage The IRS213(0,03,2)J package lacks some pins (see page 8) in order to maximizing the distance between the high voltage and low voltage pins. It’s strongly recommended to place the components tied to the floating voltage in the respective high voltage portions of the device (VB1,2,3, VS1,2,3) side. 2.2 Ground Plane To minimize noise coupling ground plane must not be placed under or near the high voltage floating side. 2.3 Gate Drive Loops Current loops behave like an antenna able to receive and transmit EM noise (see Fig. 9). In order to reduce EM coupling and improve the power switch turn on/off performances, gate drive loops must be reduced as much as possible. Moreover, current can be injected inside the gate drive loop via the IGBT collector-to- gate parasitic capacitance. The parasitic auto- inductance of the gate loop contributes to develop a voltage across the gate-emitter increasing the possibility of self turn-on effect. gate resistance VSX ( Vs0 ) VBX (VCC) HOX (LOX ) VGE Gate Drive Loop CGC IGC Fig. 9. Antenna Loops 2.4 Supply Capacitors Supply capacitors must be placed as close as possible to the device pins (VCC and VSS for the ground tied supply, VB and VS for the floating supply) in order to minimize parasitic inductance/resistance. PRELIMINARY |
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