MDT10P74(BA)

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P. 3

2008/6 Ver. 1.6

5. Order Information

Device

ROM

(Words)

RAM

(Bytes)

I/O

A/D

(8 bits)

Timer

(8/16)

CCP

SCM/

USART

Package

MDT10P74P11

4K

192

33

8-channel

2/1

2

YES/YES

DIP

MDT10P74Q11

4K

192

33

8-channel

2/1

2

YES/YES

QFP

MDT10P74L11

4K

192

33

8-channel

2/1

2

YES/YES

PLCC

6. Pin Function Description

Pin Name

I/O

Function Description

PA0~PA3, PA5

I/O

Port A, TTL input level / Analog input channel

PA4

I/O

PA4, Schmitt Trigger input levels, Open drain output

PB0~PB7

I/O

Port B, TTL input level / PB0: External interrupt input PB4~PB7:Interrupt on pin change

PC0~PC7

I/O

Port C, Schmitt Trigger input levels

PD0~PD7

I/O

Port D, Schmitt Trigger input levels / TTL input level

PE0~PE2

I/O

Port E, Schmitt Trigger input levels / TTL input level

Analog input channel

/MCLR

I

Master Clear, Schmitt Trigger input levels

OSC1/CLKIN

I

Oscillator Input/external clock input

OSC2/CLKOUT

O

Oscillator Output/in RC mode, the CLKOUT pin has 1/4 frequency of CLKIN

VDD

Power supply

VSS

Ground

7. Memory Map

(A) Register Map

Address

Description

BANK0

00

Indirect Addressing Register

01

RTCC

02

PCL

03

STATUS

04

MSR

05

Port A

06

Port B

07

Port C

08

Port D

09

Port E