10
General-Purpose Timers ................................................................................................. 193
10.1
Block Diagram ........................................................................................................................ 194
10.2
Functional Description ............................................................................................................. 194
10.2.1 GPTM Reset Conditions .......................................................................................................... 194
10.2.2 32-Bit Timer Operating Modes .................................................................................................. 194
10.2.3 16-Bit Timer Operating Modes .................................................................................................. 196
10.3
Initialization and Configuration ................................................................................................. 200
10.3.1 32-Bit One-Shot/Periodic Timer Mode ....................................................................................... 200
10.3.2 32-Bit Real-Time Clock (RTC) Mode ......................................................................................... 201
10.3.3 16-Bit One-Shot/Periodic Timer Mode ....................................................................................... 201
10.3.4 16-Bit Input Edge Count Mode ................................................................................................. 202
10.3.5 16-Bit Input Edge Timing Mode ................................................................................................ 202
10.3.6 16-Bit PWM Mode ................................................................................................................... 203
10.4
Register Map .......................................................................................................................... 203
10.5
Register Descriptions .............................................................................................................. 204
11
Watchdog Timer ............................................................................................................... 229
11.1
Block Diagram ........................................................................................................................ 229
11.2
Functional Description ............................................................................................................. 229
11.3
Initialization and Configuration ................................................................................................. 230
11.4
Register Map .......................................................................................................................... 230
11.5
Register Descriptions .............................................................................................................. 231
12
Universal Asynchronous Receivers/Transmitters (UARTs) ......................................... 252
12.1
Block Diagram ........................................................................................................................ 253
12.2
Functional Description ............................................................................................................. 253
12.2.1 Transmit/Receive Logic ........................................................................................................... 253
12.2.2 Baud-Rate Generation ............................................................................................................. 254
12.2.3 Data Transmission .................................................................................................................. 255
12.2.4 Serial IR (SIR) ......................................................................................................................... 255
12.2.5 FIFO Operation ....................................................................................................................... 256
12.2.6 Interrupts ................................................................................................................................ 256
12.2.7 Loopback Operation ................................................................................................................ 257
12.2.8 IrDA SIR block ........................................................................................................................ 257
12.3
Initialization and Configuration ................................................................................................. 257
12.4
Register Map .......................................................................................................................... 258
12.5
Register Descriptions .............................................................................................................. 259
13
Synchronous Serial Interface (SSI) ................................................................................ 293
13.1
Block Diagram ........................................................................................................................ 293
13.2
Functional Description ............................................................................................................. 293
13.2.1 Bit Rate Generation ................................................................................................................. 294
13.2.2 FIFO Operation ....................................................................................................................... 294
13.2.3 Interrupts ................................................................................................................................ 294
13.2.4 Frame Formats ....................................................................................................................... 295
13.3
Initialization and Configuration ................................................................................................. 302
13.4
Register Map .......................................................................................................................... 303
13.5
Register Descriptions .............................................................................................................. 304
14
Inter-Integrated Circuit (I2C) Interface ............................................................................ 330
14.1
Block Diagram ........................................................................................................................ 330
5
October 09, 2007
Preliminary
LM3S1911 Microcontroller