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CAT812STBI-T3 Datasheet(PDF) 2 Page - Catalyst Semiconductor |
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CAT812STBI-T3 Datasheet(HTML) 2 Page - Catalyst Semiconductor |
2 / 11 page CAT811, CAT812 Doc. No. MD-3005 Rev. S 2 © Catalyst Semiconductor, Inc. Characteristics subject to change without notice PIN DESCRIPTION Pin Number CAT811 CAT812 Name Description 1 1 GND Ground 2 — RESET ¯¯¯¯¯¯ Active LOW reset. RESET ¯¯¯¯¯¯ is asserted if VCC falls below the reset threshold and remains low for at least 140ms after VCC rises above the reset threshold. — 2 RESET Active HIGH reset. RESET is asserted if VCC falls below the reset threshold and remains high for at least 140ms after VCC rises above the reset threshold. 3 3 MR ¯¯¯ Manual Reset Input. A logic LOW on MR ¯¯¯ asserts RESET. RESET remains active as long as MR ¯¯¯ is LOW and for 140ms after MR ¯¯¯ returns HIGH. The active low input has an internal 20kΩ pull-up resistor. The input should be left open if not used. 4 4 VCC Power supply voltage that is monitored. BLOCK DIAGRAM CAT812 VCC RESET + – RESET & DIGITAL DELAY VCC TOLERANCE BIAS VOLTAGE REFERENCE GND CAT811 VCC RESET + – RESET & DIGITAL DELAY VCC TOLERANCE BIAS VOLTAGE REFERENCE GND VCC VCC MR MR |
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