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PSD413A2-C-70J Datasheet(PDF) 4 Page - STMicroelectronics |
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PSD413A2-C-70J Datasheet(HTML) 4 Page - STMicroelectronics |
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4 / 123 page  1 1.0 Introduction Programmable Peripheral PSD4XX Family Field-Programmable Microcontroller Peripherals The PSD4XX family is a microcontroller peripheral that integrates high-performance and user-configurable blocks of EPROM, programmable logic, and SRAM into one part. The PSD4XX products also provide a powerful microcontroller interface that eliminates the need for external “glue logic”. The no “glue logic” concept provides a user-programmable interface to a variety of 8- and 16-bit (multiplexed or non-multiplexed) microcontrollers that is easy to use. The part’s integration, small form factor, low power consumption, and ease of use make it the ideal part for interfacing to virtually any microcontroller. The PSD4XX provides two Zero-power PLDs (ZPLD): a Decode PLD (DPLD) and a General-purpose PLD (GPLD). A configuration bit (Turbo) can be set by the MCU, and will automatically place the ZPLDs into Standby Mode if no inputs are changing. The ZPLDs are designed to consume minimum power using Zero-power CMOS technology that uses only 10 µA (typical) standby current. Unused product terms are automatically disabled, also reducing power, regardless of the Turbo bit setting. The main function of the DPLD is to perform address decoding for the internal I/O ports, EPROM, and SRAM. The address decoding can be based on up to 24 bits of address inputs, control signals (RD, WR, PSEN, etc.), and internal page logic. The DPLD supports separate program and data spaces (for 8031 compatible MCUs). The General-purpose PLD (GPLD) can be used to implement various logic functions defined by the user, such as: • State machines • Loadable counters and shift registers • Inter-processor mailbox • External control logic (chip selects, output enables, etc.). The GPLD has access to up to 59 inputs, 118 product terms, 24 macrocells, and 24 I/O pins. |
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