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PSD412A1-C-90UI Datasheet(PDF) 11 Page - STMicroelectronics

Part # PSD412A1-C-90UI
Description  Low Cost Field Programmable Microcontroller Peripherals
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

PSD412A1-C-90UI Datasheet(HTML) 11 Page - STMicroelectronics

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PSD4XX Family
8
Pin Name
Pin Function
Type
Function Descriptions
ADIO0 – ADIO15
Address/data bus
I/O
1. Address/data bus, multiplexed
bus mode
2. Address bus, non-multiplexed
bus mode
RD
Multiple Names
I
Multiple functions
1. Read
1. Read signal
2. E
2. E signal (Clock)
3. DS
3. Data strobe signal
4. LDS
4. Low byte data strobe
WR
Multiple Names
I
Multiple functions
1. WR
1. Write signal
2. R/W
2. Read-write signal
3. WRL
3. Low byte write signal
CSI
Chip Select Input
I
Active low, select PSD4XX
standby mode if high.
RESET
Reset Input
I
Reset I/O ports, ZPLD/macrocells,
and Configuration Registers.
Active low.
CLKIN
Input clock
I
Clock input to ZPLD macrocells,
ZPLD Array and APD counter.
Connect to ground if Clock Input
not used.
PA0 – PA7
I/O Port A
I/O
Multiple functions
1. I/O port
2. ZPLD/macrocell I/O port
3. Latched address outputs
(PA0 – PA7)
→ (A0 – A7)
4. High address inputs (A16 – A23)
PB0 – PB7
I/O Port B
I/O
Multiple functions
1. I/O port
2. ZPLD/macrocell I/O port
3. Latched address outputs
(PB0–PB7)
→ (A0–A7) or (A8–A15)
PC0 – PC7
I/O Port C
I/O
Multiple functions
CMOS
1. I/O port
or
2. ZPLD input port
*
OD
3. Latched address outputs
(PC0 – PC7)
→ (A0–A7)
4. Data Port (D0 – D7,
non-multiplexed bus)
PD0 – PD7
I/O Port D
I/O
Multiple functions
CMOS
1. I/O port
or
2. ZPLD input port
*
OD
3. Latched address outputs
(PD0–PD7)
→ (A0–A7) or (A8–A15)
4. Data Port (D8 –D15,
non-multiplexed bus)
8.0
Table 2.
PSD4XX Pin
Descriptions
The following table describes the pin names and pin functions of the PSD4XX. Pins that
have multiple names and/or functions are defined by user configuration.
*Available only in PSD4XXA2 and ZPSD4XXA2 Series.


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