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SI91871DMP-50-T1 Datasheet(PDF) 4 Page - Vishay Siliconix |
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SI91871DMP-50-T1 Datasheet(HTML) 4 Page - Vishay Siliconix |
4 / 10 page Si91871 Vishay Siliconix www.vishay.com 4 Document Number: 72012 S-51147—Rev. F, 20-Jun-05 PIN CONFIGURATION MLP33-5 PowerPAK 1 2 1 2 3 4 5 3 4 5 SD BP VIN VOUT GND GND GND GND Top View Bottom View PIN DESCRIPTION Pin Number Name Function 1 SD By applying less than 0.4 V to this pin, the device will be turned off. Connect this pin to VIN if unused 2 BP Noise bypass pin. For low noise applications, a 0.01 mF ceramic capacitor should be connected from this pin to ground. 3 VIN Input supply pin. Bypass this pin with a 1-mF ceramic or tantalum capacitor to ground 4 VOUT Output voltage. Connect COUT between this pin and ground. 5 GND Ground pin. For better thermal capability, directly connected to large ground plane ORDERING INFORMATION Standard Part Number Lead (Pb)-Free Part Number Marking Voltage Temp. Range Pkg. Si91871DMP-12-T1 Si91871DMP-12-E3 7112 1.2 Si91871DMP-18-T1 Si91871DMP-18-E3 7118 1.8 Si91871DMP-25-T1 Si91871DMP-25-E3 7125 2.5 Si91871DMP-26-T1 Si91871DMP-26-E3 7126 2.6 40 to 85_C MLP33 5 Si91871DMP-28-T1 Si91871DMP-28-E3 7128 2.8 −40 to 85_C MLP33-5 Si91871DMP-30-T1 Si91871DMP-30-E3 7130 3.0 Si91871DMP-33-T1 Si91871DMP-33-E3 7133 3.3 Si91871DMP-50-T1 Si91871DMP-50-E3 7150 5.0 |
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