Low-Noise Step-Up DC-DC Converter

10

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Diode Selection

The output diode should be rated to handle the output

voltage and the peak switch current. Make sure that the

recommended.

Input and Output Capacitor Selection

Low-ESR capacitors are recommended for input

bypassing and output filtering. Low-ESR tantalum

capacitors are a good compromise between cost and

performance. Ceramic capacitors are also a good

choice. Avoid standard aluminum electrolytic capaci-

tors. A simple equation to estimate input and output-

capacitor values for a given voltage ripple is as follows:

capacitor.

Output Voltage

The MAX17067 operates with an adjustable output from

(see the

Typical Operating Circuit) from the output to

GND. Select the resistor values as follows:

1.24V. Since the input bias current into FB is typically

zero, R2 can have a value up to 100k

Ω without sacrificing

accuracy. Connect the resistor-divider as close to the IC

as possible.

Loop Compensation

The voltage feedback loop needs proper compensation

to prevent excessive output ripple and poor efficiency

caused by instability. This is done by connecting a resis-

quency integrator gain for fast-transient response, while

to cancel the zero introduced by output-capacitance

ESR. For optimal performance, choose the components

using the following equations:

For the ceramic output capacitor, where ESR is small,

external component values for several applications.

The best gauge of correct loop compensation is by

inspecting the transient response of the MAX17067.

mal transient performance.

Soft-Start Capacitor

The soft-start capacitor should be large enough that it

does not reach final value before the output has

where:

capacitor on the output bus

The load must wait for the soft-start cycle to finish

before drawing a significant amount of load current.

The duration after which the load can begin to draw

maximum load current is:

C

21

10

C

V

V

V

V

I

I

V

SS

6

OUT

IN

OUT

IN

INRUSH

OUT

OUT

OUT

2

>×

×

−×

×−

×

⎛

⎝

⎜

⎞

⎠

⎟

−

RR

V

V

OUT

FB

12

1

=−

⎛

⎝⎜

⎞

⎠⎟

C

0.5

L

I

V

V

PK

2

RIPPLE

OUT

≥

×× ⎛⎝

⎞

⎠

×