MT89L80

Data Sheet

6

Zarlink Semiconductor Inc.

Figure 4 - Control Register Bits

Figure 5 - Connection Memory High Bits

6

Message

Mode

When 1, the contents of the Connection Memory Low are output on the Serial Output

streams except when the ODE pin is low. When 0, the Connection Memory bits for each

channel determine what is output.

5

(unused)

4-3

Memory

Select Bits

0-0 - Not to be used

0-1 - Data Memory (read only from the microprocessor port)

1-0 - Connection Memory Low

1-1 - Connection Memory High

2-0

Stream

Address Bits

The number expressed in binary notation on these bits refers to the input or output ST-BUS

stream which corresponds to the subsection of memory made accessible for subsequent

operations.

Bit

Name

Description

2

Message

Channel

When 1, the contents of the corresponding location in Connection Memory Low are

output on the location’s channel and stream. When 0, the contents of the corresponding

location in Connection Memory Low act as an address for the Data Memory and so

determine the source of the connection to the location’s channel and stream.

1

CSTo Bit

This bit is output on the CSTo pin one channel early. The CSTo bit for stream 0 is output

first.

0

Output

Enable

If the ODE pin is high and bit 6 of the Control Register is 0, then this bit enables the

output driver for the location’s channel and stream. This allows individual channels on

individual streams to be made high-impedance, allowing switching matrices to be

constructed. A 1 enables the driver and a 0 disables it.

Bit

Name

Description

7

6

5

432

1

0

Mode

Control

Bits

(unused)

Memory

Select

Bits

Stream

Address

Bits

76

5

4

3

2

1

0

No Corresponding Memory

- These bits give 0s if read.

Per Channel

Control Bits