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M89132W-15T1T Datasheet(PDF) 1 Page - STMicroelectronics |
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M89132W-15T1T Datasheet(HTML) 1 Page - STMicroelectronics |
1 / 7 page 1/7 DATA BRIEFING June 2000 Complete data available on Data-on-Disc CD-ROM or at www.st.com M89 FAMILY In-System Programmable (ISP) Multiple-Memory and Logic FLASH+PSD Systems for MCUs s Single Supply Voltage: –5 V ±10% for M89xxFxY – 3 V (+20/–10%) for M89xxFxW s 1 or 2 Mbit of Primary Flash Memory (8 uniform sectors, 16K x 8, or 32K x 8) s A second non-volatile memory: – 256 Kbit (32K x 8) EEPROM (for M8913F1x) or Flash memory (for M89x3F2x) – 4 uniform sectors (8K x 8) s SRAM (16 Kbit, 2K x 8; or 64 Kbit, 8K x 8) s Over 2,000 Gates of PLD: DPLD and GPLD s 27 Reconfigurable I/O ports s Enhanced JTAG Serial Port s Programmable power management s Stand-by current: –50 µA for M89xxFxY –25 µA for M89xxFxW s High Endurance: – 100,000 Erase/Write Cycles of Flash Memory – 10,000 Erase/Write Cycles of EEPROM – 1,000 Erase/Write Cycles of PLD Figure 1. Logic Diagram AI02856 16 AD0-AD15 PC0-PC7 VCC FLASH+PSD VSS 8 PD0-PD2 3 PB0-PB7 8 PA0-PA7 8 3 CNTL0- CNTL2 RESET Table 1. Signal Names PA0-PA7 Port-A PB0-PB7 Port-B PC0-PC7 Port-C PC2 = Voltage Stand-by PD0-PD2 Port-D AD0-AD15 Address/Data CNTL0-CNTL2 Control RESET Reset VCC Supply Voltage VSS Ground PLCC52 (K) PQFP52 (T) |
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