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SN74BCT652DWE4 Datasheet(PDF) 3 Page - Texas Instruments |
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SN74BCT652DWE4 Datasheet(HTML) 3 Page - Texas Instruments |
3 / 16 page SN54BCT652, SN74BCT652 OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS SCBS038A – AUGUST 1989 – REVISED NOVEMBER 1993 2–3 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 FUNCTION TABLE INPUTS DATA I/O† OPERATION OR FUNCTION OEAB OEBA CLKAB CLKBA SAB SBA A1 THRU A8 B1 THRU B8 OPERATION OR FUNCTION L H H or L H or L X X Input Input Isolation L H ↑↑ X X Input Input Store A and B data X H ↑ H or L X X Input Unspecified‡ Store A, hold B H H ↑↑ X‡ X Input Output Store A in both registers L X H or L ↑ X X Unspecified‡ Input Hold A, store B L L ↑↑ XX‡ Output Input Store B in both registers L L X X X L Output Input Real-time B data to A bus L L X H or L X H Output Input Stored B data to A bus H H X X L X Input Output Real-time A data to B bus H H H or L X H X Input Output Stored A data to B bus H L H or L H or L H H Output Output Stored A data to B bus and stored B data to A bus † The data output functions may be enabled or disabled by a variety of level combinations at the OEAB or OEBA inputs. Data input functions are always enabled; i.e., data at the bus pins is stored on every low-to-high transition on the clock inputs. ‡ Select control = L; clocks can occur simultaneously. Select control = H; clocks must be staggered in order to load both registers. logic symbol§ OEBA EN1 [BA] 21 G5 22 SBA A1 4 B1 20 4D EN2 [AB] 3 OEAB 23 CLKBA 1 CLKAB G7 2 SAB 5 7 7 5 1 1 6D ≥1 ≥1 1 2 C6 C4 A2 5 B2 19 A3 6 B3 18 A4 7 B4 17 A5 8 B5 16 A6 9 B6 15 A7 10 B7 14 A8 11 B8 13 § This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for the DW, JT, NT, and W packages. |
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