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M87C257-80F1X Datasheet(PDF) 8 Page - STMicroelectronics |
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M87C257-80F1X Datasheet(HTML) 8 Page - STMicroelectronics |
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8 / 13 page  tAVEL VALID AI00557 A0-A14 Q0-Q7 ASVPP VCC G DATA IN DATA OUT E tQVEL tVPHEL tVCHEL tEHQX tELEH tGLQV tQXGL tGHQZ tGHAX PROGRAM VERIFY Figure 6. Programming and Verify Modes AC Waveforms PRESTO II Programming Algorithm PRESTO II Programming Algorithm allows to pro- gram the whole array with a guaranteed margin, in a typical time of 3.5 seconds. Programming with PRESTO II involves the application of a sequence of 100 µs program pulses to each byte until a correct verify occurs (see Figure 7). During programming and verify operation, a MARGIN MODE circuit is automatically activated in order to guarantee that each cell is programmed with enough margin. No overprogram pulse is applied since the verify in MARGIN MODE provides necessary margin to each programmed cell. Program Inhibit Programming of multiple M87C257s in parallel with different data is also easily accomplished. Except for E, all like inputs including G of the parallel M87C257 may be common. A TTL low level pulse applied to a M87C257’s E input, with VPP at 12.75V, will program that M87C257. A high level E input inhibits the other M87C257s from being pro- grammed. Program Verify A verify (read) should be performed on the pro- grammed bits to determine that they were correctly programmed. The verify is accomplished with G at VIL, E at VIH, VPP at 12.75V and VCC at 6.25V. AI00760B n = 0 Last Addr VERIFY E = 100 µs Pulse ++n = 25 ++ Addr VCC = 6.25V, VPP = 12.75V FAIL CHECK ALL BYTES 1st: VCC = 6V 2nd: VCC = 4.2V YES NO YES NO YES NO Figure 7. Programming Flowchart 8/13 M87C257 |
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