M54HC73F1R datasheet(1/11 Pages) STMICROELECTRONICS

Part #	M54HC73F1R

Description	DUAL J-K FLIP FLOP WITH PRESET AND CLEAR

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Manufacturer	STMICROELECTRONICS [STMicroelectronics]

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M54HC73

M74HC73

October 1992

DUAL J-K FLIP FLOP WITH PRESET AND CLEAR

B1R

(Plastic Package)

ORDER CODES :

M54HC73F1R

M74HC73M1R

M74HC73B1R

M74HC73C1R

F1R

(Ceramic Package)

M1R

(Micro Package)

C1R

(Chip Carrier)

PIN CONNECTIONS (top view)

NC =

No Internal

Connection

INPUT AND OUTPUT EQUIVALENT CIRCUIT

.

HIGH SPEED

fMAX = 75 MHz (TYP.) AT VCC =5 V

.

LOW POWER DISSIPATION

ICC =2

µA (MAX.) AT TA =25 °C

.

HIGH NOISE IMMUNITY

VNIH =VNIL =28 % VCC (MIN.)

.

OUTPUT DRIVE CAPABILITY

10 LSTTL LOADS

.

SYMMETRICAL OUTPUT IMPEDANCE

IOH =IOL = 4 mA (MIN.)

.

BALANCED PROPAGATION DELAYS

tPLH =tPHL

.

WIDE OPERATING VOLTAGE RANGE

VCC (OPR) = 2 V TO 6 V

.

PIN AND FUNCTION COMPATIBLE WITH

54/74LS73

The M54/74HC73 is a high speed CMOS DUAL J-K

FLIP FLOP WITH CLEAR fabricated in silicon gate

C

2MOS technology. It has the same high speed per-

formance of LSTTL combined with true CMOS low

power consumption. Depending on the logic level

applied to J and K inputs, this device changes state

on the negative going transition of clock input pulse

(CK). The clear function is accomplished inde-

pendently of the clock condition when the clear input

(CLR) is taken low. All inputs are equipped with pro-

tection circuits against static discharge and transient

excess voltage.

DESCRIPTION

1/11

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