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TMS320LF2402 Datasheet(PDF) 2 Page - Texas Instruments |
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TMS320LF2402 Datasheet(HTML) 2 Page - Texas Instruments |
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2 / 116 page  TMS320LF2407, TMS320LF2406, TMS320LF2402 DSP CONTROLLERS SPRS094I − APRIL 1999 − REVISED SEPTEMBER 2003 2 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 Description 4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TMS320x240x Device Summary 5 . . . . . . . . . . . . . . . . . . . Functional Block Diagram of the 2407 DSP Controller 6 Pin Functions 10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Memory Maps 17 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Peripheral Memory Map of the LF240x 20 . . . . . . . . . . . . Device Reset and Interrupts 21 . . . . . . . . . . . . . . . . . . . . . DSP CPU Core 25 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TMS320x240x Instruction Set 25 . . . . . . . . . . . . . . . . . . . . Functional Block Diagram of the 240x DSP CPU 26 . . . . Peripherals 35 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Event Manager Modules (EVA, EVB) 35 . . . . . . . . . . . . Enhanced Analog-to-Digital Converter (ADC) Module 39 . . . . . . . . . . . . . . . . . . . . . . . . . . . . Controller Area Network (CAN) Module 41 . . . . . . . . . . Serial Communications Interface (SCI) Module 44 . . . . Serial Peripheral Interface (SPI) Module 46 . . . . . . . . . . PLL-Based Clock Module 48 . . . . . . . . . . . . . . . . . . . . . . Digital I/O and Shared Pin Functions 51 . . . . . . . . . . . . . External Memory Interface (LF2407) 54 . . . . . . . . . . . . . Watchdog (WD) Timer Module 55 . . . . . . . . . . . . . . . . . . Development Support 58 . . . . . . . . . . . . . . . . . . . . . . . . . . . Documentation Support 61 . . . . . . . . . . . . . . . . . . . . . . . . . Absolute Maximum Ratings 62 . . . . . . . . . . . . . . . . . . . . . . Recommended Operating Conditions 62 . . . . . . . . . . . . . Peripheral Register Description 99 . . . . . . . . . . . . . . . . . . . Mechanical Data 112 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Table of Contents REVISION HISTORY REVISION DATE PRODUCT STATUS HIGHLIGHTS F January 2001 Production Data The description for the VCCP pin has been modified. This informa- tion can be found in Table 2, LF240x Pin List and Package Options. The conditions for high-impedance state for the strobe signals have been changed. This information can be found in Table 2, LF240x Pin List and Package Options. The th(A)COLW parameter is now referenced from the next falling CLKOUT edge than what was shown in the previous data sheets. The specification for this parameter is −5 ns (MIN). Ready-on-Read and Ready-on-Write timings for one software wait state and one external wait state have been added. Bits 15 and 8 of the SCSR1 register are now reserved (see Table 19, LF240x DSP Peripheral Register Description). G August 2001 Production Data Updated description of TMS2 in Table 2. Updated Figure 6, Event Manager A Block Diagram. TCLKINx is now routed through the prescaler. Updated the ADC module list of functions in the Enhanced Analog- to-Digital Converter (ADC) Module section (p.39). The I/O buffers used in 240x/240xA are not 5-V compatible. Updated the fCLKOUT parameter in the Recommended Operating Conditions table (p.62). Updated the tc(AD) and tw(SHC) parameters in the Internal ADC Mod- ule Timings table of the 10-Bit Analog-to-Digital Converter (ADC) section (p.97). Updated PDDATDIR register (0x0709E) in Table 19, LF240x DSP Peripheral Register Description. |
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