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M59MR032C Datasheet(PDF) 1 Page - STMicroelectronics |
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M59MR032C Datasheet(HTML) 1 Page - STMicroelectronics |
1 / 49 page 1/49 April 2001 M59MR032C M59MR032D 32 Mbit (2Mb x16, Mux I/O, Dual Bank, Burst) 1.8V Supply Flash Memory s SUPPLY VOLTAGE –VDD = VDDQ = 1.65V to 2.0V for Program, Erase and Read –VPP = 12V for fast Program (optional) s MULTIPLEXED ADDRESS/DATA s SYNCHRONOUS / ASYNCHRONOUS READ – Configurable Burst mode Read – Page mode Read (4 Words Page) – Random Access: 100ns s PROGRAMMING TIME – 10µs by Word typical – Double Word Programming Option s MEMORY BLOCKS – Dual Bank Memory Array: 8 Mbit - 24 Mbit – Parameter Blocks (Top or Bottom location) s DUAL BANK OPERATIONS – Read within one Bank while Program or Erase within the other – No delay between Read and Write operations s BLOCK PROTECTION/UNPROTECTION – All Blocks protected at Power-up – Any combination of Blocks can be protected s COMMON FLASH INTERFACE (CFI) s 64 bit SECURITY CODE s ERASE SUSPEND and RESUME MODES s 100,000 PROGRAM/ERASE CYCLES per BLOCK s ELECTRONIC SIGNATURE – Manufacturer Code: 20h – Top Device Code, M59MR032C: A4h – Bottom Device Code, M59MR032D: A5h BGA µBGA LFBGA54 (ZC) 10 x 4 ball array µBGA46 (GC) 10 x 4 ball array Figure 1. Logic Diagram AI90109 5 A16-A20 W ADQ0-ADQ15 VDD M59MR032C M59MR032D E VSS 16 G RP WP VDDQ VPP L K WAIT BINV |
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